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These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withsta.
48A, 60V. RDS(ON) = 0.025Ω @ VGS = 5V. Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2.0V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum junction temperature rating. High density cell design for extremely low RDS(ON). TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications. ________________________________________________________________________________ D G S Absolute Maximum Rating.
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