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SI1012

Silicon Laboratories

Ultra Low Power ADC - Silicon Laboratories


SI1012
SI1012

PDF File SI1012 PDF File



Description
Si1010/1/2/3/4/5 Ultra Low Power, 16/8 kB, 12/10-Bit ADC MCU with Integrated 240–960 MHz EZRadioPRO® Transceiver Ultra Low Power: 0.
9 to 3.
6 V Operation - Typical sleep mode current < 0.
1 µA; retains state and RAM contents over full supply range; fast wakeup of < 2 µs Less than 600 nA with RTC running Less than 1 µA with RTC running and radio state retained On-chip dc-dc converter allows operation down to 0.
9 V.
Two built-in brown-out detectors cover sleep and active modes EZRadioPRO® Transceiver Frequency range = 240–960 MHz Sensitivity = –121 dBm FSK, GFSK, and OOK modulation Max output power = +20 dBm (Si1010/1), +13 dBm (Si1012/3/4/5) RF power consumption - 18.
5 mA receive - 18 mA @ +1 dBm transmit - 30 mA @ +13 dBm transmit - 85 mA @ +20 dBm transmit (Si1010/1) Data rate = 0.
123 to 256 kbps Auto-frequency calibration (AFC) Antenna diversity and transmit/receive switch control Programmable packet handler TX and RX 64 byte FIFOs Frequency hopping capability On-chip crystal tuning 10-Bit or 12-Bit Analog to Digital Converter - Up to 300 ksps - Up to 18 external inputs - External pin or internal VREF (no external capacitor required) Built-in temperature sensor External conversion start input option Autonomous burst mode with 16-bit automatic averaging accumulator Dual Comparators - Programmable hysteresis and response time - Configurable as interrupt or reset source - Low current (< 0.
5 µA) On-Chip Debug - On-chip debug circuitry facilitates full-speed, non-intrusive in-system debug (No emulator required) Digital Peripherals - 12 port I/O plus 3 GPIO pins; Hardware enhanced UART, SPI, and I2C serial ports available concurrently Low power 32-bit SmaRTClock Four general purpose 16-bit counter/timers; six channel programmable counter array (PCA) - Provides breakpoints, single stepping - Inspect/modify memory and registers - Complete development kit High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instrucMemory - 768 bytes RAM 16 kB (S...



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