128-Mbit (8Mb x 16 Multiple Bank Multi-Level Burst) 1.8V Supply Flash Memory
Description
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M30L0R7000T0 M30L0R7000B0
128 Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.
8V Supply Flash Memory
FEATURES SUMMARY
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SUPPLY VOLTAGE – VDD = 1.
7V to 2.
0V for program, erase and read – VDDQ = 1.
7V to 2.
0V for I/O Buffers – VPP = 9V for fast program (12V tolerant) SYNCHRONOUS / ASYNCHRONOUS READ – Synchronous Burst Read mode: 54MHz – Asynchronous Page Read mode – Random Access: 85ns SYNCHRONOUS BURST READ SUSPEND PROGRAMMING TIME – 10µs typical Word program time using Buffer Program MEMORY ORGANIZATION – Multiple Bank Memory Array: 8 Mbit Banks – Parameter Blocks (Top or Bottom location) DUAL OPERATIONS – program/erase in one Bank while read in others – No delay between read and write operations BLOCK LOCKING – All blocks locked at power-up – Any combination of blocks can be locked with zero latency – WP for Block Lock-Down – Absolute Write Protection with VPP = VSS SECURITY – 64 bit unique device number – 2112 bit user programmable OTP Cells COMMON FLASH INTERFACE (CFI) 100,000 PROGRAM/ERASE CYCLES per BLOCK
Figure 1.
Package
FBGA
TFBGA88 (ZAQ) 8 x 10mm
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ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code: 88C4h.
– Bottom Device Code: 88C5h PACKAGE – Compliant with Lead-Free Soldering Processes – Lead-Free Versions
December 2004
1/83
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DataSheet4U.
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M30L0R7000T0, M30L0R7000B0
TABLE OF CONTENTS
FEATURES SUMMARY .
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1 Figure 1.
Package.
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1 SUMMARY DESCRIPTION .
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6 Figure 2.
Table 1.
Figure 3.
Table 2.
Figure 4.
Logic Diagram .
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