P-Channel MOSFET
Description
SPICE Device Model Si1473DH Vishay Siliconix P-Channel 30-V (D-S) MOSFET
CHARACTERISTICS
• P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range • Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics
DESCRIPTION
www.
DataSheet4U.
com The attached spice model describes the typical electrical characteristics of the p-channel vertical DMOS.
The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 10-V gate drive.
The saturated output impedance is best fit at the gate bias near the threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model.
All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet.
Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits.
Document Number: 74371 S-70349Rev.
A, 26-Feb-07 www.
vishay.
com 1
SPICE Device Model Si1473DH Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static
Gate Threshold Voltage On-State Drain Current
a
Symbol
Test Condition
Simulated Data
2.
2 55 0.
085 0.
118 3 −0.
84
Measured Data
Unit
VGS(th) ID(on) rDS(on) gfs VSD
VDS = VGS, ID = −250 µA VDS ≤ −5 V, VGS = −10 V VGS = −10 V, ID = −2 A VGS = −4.
5 V, ID = −1.
6 A VDS = −10 V, ID = −2 A IS = −2 A
V A 0.
084 0.
120 6 −0.
85 Ω S V
Drain-Source On-State Resistancea Forward Transconductancea
www.
DataSheet4U.
com Diode Forward Voltagea
Dynamicb
Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Sou...
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