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ICS853014

ICST

DIFFERENTIAL-TO-LVPECL/ECL FANOUT BUFFER


ICS853014
ICS853014

PDF File ICS853014 PDF File


Description
www.
DataSheet4U.
com Integrated Circuit Systems, Inc.
ICS853014 LOW SKEW, 1-TO-5 2.
5V/3.
3V DIFFERENTIAL-TO-LVPECL/ECL FANOUT BUFFER FEATURES • 5 differential LVPECL/ECL outputs • 2 selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: > 2GHz • Output skew: 13ps (typical) • Part-to-part skew: 60ps (typical) • Propagation delay: 460ps (typical) • LVPECL mode operating voltage supply range: VCC = 2.
375V to 3.
8V, VEE = 0V • ECL mode operating voltage supply range: VCC = 0V, VEE = -3.
8V to -2.
375V • -40°C to 85°C ambient operating temperature • Lead-Free package fully RoHS compliant GENERAL DESCRIPTION The ICS853014 is a low skew, high performance 1-to-5, 2.
5V/3.
3V Differential-to-LVPECL/ECL HiPerClockS™ Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.
The ICS853014 has two selectable clock inputs.
ICS Guaranteed output and par t-to-part skew characteristics make the ICS853014 ideal for those applications demanding well defined performance and repeatability.
BLOCK DIAGRAM nEN D Q LE PCLK0 nPCLK0 PCLK1 nPCLK1 PIN ASSIGNMENT Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC nEN VCC nPCLK1 PCLK1 VBB nPCLK0 PCLK0 CLK_SEL VEE 00 11 Q0 nQ0 Q1 nQ1 CLK_SEL Q2 nQ2 V BB Q3 nQ3 Q4 nQ4 ICS853014 20-Lead TSSOP 6.
5mm x 4.
4mm x 0.
92mm package body G Package Top View 853014BG www.
icst.
com/products/hiperclocks.
html 1 REV.
C MAY 13, 2005 Integrated Circuit Systems, Inc.
ICS853014 LOW SKEW, 1-TO-5 2.
5V/3.
3V DIFFERENTIAL-TO-LVPECL/ECL FANOUT BUFFER Type Description Differential output pair.
LVPECL / ECL interface levels.
Differential output pair.
LVPECL / ECL interface levels.
Differential output pair.
LVPECL / ECL interface levels.
Differential output pair.
LVPECL / ECL interface levels.
Differential output pair.
LVPECL / ECL interface levels.
Negative supply pin.
Clock s...



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