(M532304x0DB0/DW0) DRAM Module - Samsung Semiconductor
Description
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DRAM MODULE
M53230400DW0/DB0 & M53230410DW0/DB0 EDO Mode 4M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V
GENERAL DESCRIPTION
The Samsung M5323040(1)0D is a 4Mx32bits Dynamic RAM high density memory module.
The Samsung M5323040(1)0D consists of eight CMOS 4Mx4bits DRAMs in 24-pin SOJ package mounted on a 72-pin glass-epoxy substrate.
A 0.
1 or 0.
22uF decoupling capacitor is mounted on the printed circuit board for each DRAM.
The M5323040(1)0D is a Single In-line Memory Module with edge connections and is intended for mounting into 72 pin edge connector sockets.
M53230400DW0/DB0 M53230410DW0/DB0
FEATURES
• Part Identification - M53230400DW0-C(4096 cycles/64ms Ref, SOJ, Solder) - M53230400DB0-C(4096 cycles/64ms Ref, SOJ, Gold) - M53230410DW0-C(2048 cycles/32ms Ref, SOJ, Solder) - M53230410DB0-C(2048 cycles/32ms Ref, SOJ, Gold) • Extended Data Out • CAS-before-RAS refresh capability • RAS-only and Hidden refresh capability • TTL compatible inputs and outputs • Single +5V±10% power supply • 1st Gen.
JEDEC standard PDPin & pinout • PCB : Height(1000mil), single sided component
PERFORMANCE RANGE
Speed -50 -60
tRAC
50ns 60ns
tCAC
13ns 15ns
tRC
90ns 110ns
tHPC
25ns 30ns
PIN CONFIGURATIONS
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Symbol VSS DQ0 DQ16 DQ1 DQ17 DQ2 DQ18 DQ3 DQ19 Vcc NC A0 A1 A2 A3 A4 A5 A6 A10 DQ4 DQ20 DQ5 DQ21 DQ6 DQ22 DQ7 DQ23 A7 A11 Vcc A8 A9 Res(RAS1) RAS0 NC NC Pin 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Symbol NC NC VSS CAS0 CAS2 CAS3 CAS1 RAS0 Res(RAS1) NC W NC DQ8 DQ24 DQ9 DQ25 DQ10 DQ26 DQ11 DQ27 DQ12 DQ28 VCC DQ29 DQ13 DQ30 DQ14 DQ31 DQ15 NC PD1 PD2 PD3 PD4 NC Vss
PIN NAMES
Pin Name A0 - A11 Function Address Inputs(4K Ref) Address Inputs(2K Ref) Data In/Out Read/Write Enable Row Address Strobe Column Address Strobe Presence Detect Power(+5V) Ground No Connection
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W RAS0
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