8-Bit Parallel-in Serial-Out Shift Register
Description
TECHNICAL DATA
8-Bit Serial or Parallel-Input/ Serial-Output Shift Register
High-Performance Silicon-Gate CMOS
The IN74HC165A is identical in pinout to the LS/ALS165.
The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
This device is an 8-bit shift register with complementary outputs from the last stage.
Data may be loaded into the register either in parallel or in serial form.
When the Serial Shift/ Parallel Load input is low, the data is loaded asynchronously in parallel.
When the Serial Shift/Parallel Load input is high, the data is loaded serially on the rising edge of either Clock or Clock Inhibit (see the Function Table).
The 2-input NOR clock may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.
• Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.
0 to 6.
0 V • Low Input Current: 1.
0 µA • High Noise Immunity Characteristic of CMOS Devices
IN74HC165A
ORDERING INFORMATION IN74HC165AN Plastic IN74HC165AD SOIC TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 16=VCC PIN 8 = GND
FUNCTION TABLE
Inputs Serial Shift/ Parallel Load L H H H H H H L L Clock H Clock Inhibit X L S
A
Internal Stages A-H a.
.
.
h X X X X X X no change QA a L H L H QB-QG b-g QAn-QFn QAn-QFn QAn-QFn QAn-QFn no change
Output QH h QGn QGn QGn QGn
Operation
X L H L H X X
Asynchronous Parallel Load Serial Shift via Clock Serial Shift via Clock Inhibit Inhibited Clock No Clock
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h s a t a
H L L X X X = Don’t Care QAn-QFn = Data shifted from the preceding stage
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IN74HC165A
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current...
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