ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS
Description
P4C1681, P4C1682
P4C1681, P4C1682 ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS
FEATURES
Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 12/15/20/25 ns (Commercial) – 20/25/35ns (P4C1682 Military) Low Power Operation (Commercial) – 715 mW Active – 12, 15 – 550 mW Active – 20/25/35 – 193 mW Standby (TTL Input) – 83 mW Standby (CMOS Input) Single 5V ± 10%Power Supply Separate Inputs and Outputs – P4C1681 Input Data at Outputs during Write – P4C1682 Outputs in High Z during Write Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) – 24-Pin 300 mil DIP – 24-Pin 300 mil SOIC – 24-Pin 300 mil SOJ – 24-Pin CERDIP – 28-Pin LCC (450 mil x 450 mil)
DESCRIPTION
The P4C1681 and P4C1682 are 16,384-bit (4K x 4) ultra high speed static RAMs similar to the P4C168, but with separate data I/O pins.
The P4C1681 features a transparent write operation; the outputs of the P4C1682 are in high impedance during the write cycle.
All devices have low power standby modes.
The RAMs operate from a single 5V ± 10% tolerance power supply.
Access times as fast as 12 nanoseconds are available, permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption to a low 715 mW active, 193 mW standby.
For the P4C1682 and P4C1681, power is only 83 mW standby with CMOS input .
levels.
The P4C1681 and P4C1682 are available in 24-pin 300 mil DIP and SOIC packages providing excellent board level densities.
The P4C1682 is also available in a 28-pin LCC package.
FUNCTIONAL BLOCK DIAGRAM
A (7) A I1 I2 I3 I4 O1 O2 O3 O4
ROW SELECT 16,384-BIT MEMORY ARRAY
PIN CONFIGURATIONS
A0 A1 A2 A3 A4 A5 A6 A7
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC
A0 VCC A3 A2 A1
A11 A10 A9 A8 I4 I3 O4 O3 O2 O1 WE
A4 A5 NC NC A6 A7 I1
12 4 5 6 7 8 9
3
2 1
28 27
A 10
26 25 24 23 22 21 20 19
A11
A9 A8 I4 NC NC I3 O4
INPUT DATA CONTROL
COLUMN I/O
10 11 13 14 15 16 17
POWER DOWN CE WE P4C1682 P4C1681
COLUMN SELECT
I1 I2 CE GND
18
I2 CE G...
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