Dual 2-to-4 Line Decoder - Toshiba
Description
TC74VHC139F/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC139F, TC74VHC139FK
Dual 2-to-4 Line Decoder
The TC74VHC139 is an advanced high speed CMOS 2 to 4 LINE DECODER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.
The active low enable input can be used for gating or it can be used as a data input for demultiplexing applications.
When the enable input is held High, all four outputs are fixed at a high logic level independent of the other inputs.
An input protection circuit ensures that 0 to 5.
5 V can be applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
This circuit prevents device destruction due to mismatched supply and input voltages.
Features
High speed: tpd = 5.
0 ns (typ.
) at VCC = 5 V Low power dissipation: ICC = 4 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Power down protection is provided on all inputs.
Balanced propagation delays: tpLH ≈ tpHL Wide operating voltage range: VCC (opr) = 2 V to 5.
5 V Pin and function compatible with 74ALS139
Pin Assignment
TC74VHC139F TC74VHC139FK
Weight SOP16-P-300-1.
27A VSSOP16-P-0030-0.
50
: 0.
18 g (typ.
) : 0.
02 g (typ.
)
1 1A 2 1B 3
4 5 6 7 GND 8
(top view)
16 VCC 15 14 2A 13 2B 12 11 10 9
© 2019
1
Toshiba Electronic Devices & Storage Corporation
Start of commercial production
1991-11
2019-01-31
IEC Logic Symbol
TC74VHC139F/FK
1A (2) 1B (3)
(1) 2A (14) 2B (13)
(15)
1
X/Y
2
EN
0 (4) 1 (5) 2 (6) 3 (7)
(12) (11) (10) (9)
1A (2) 1B (3)
(1) 2A (14) 2B (13)
(15)
DMUX 0 (4)
0
1 (5)
1
2 (6)
3 (7)
(12)
(11)
(10)
(9)
Truth Table
Inputs
Outputs
Enable
G H L L L L
Select
Y0 Y1 Y2 Y3
B
A
X
X
H
H
H
H
L
L
L
H
H
H
L
H
H
L
H
H
H
L
H
H
L
H
H
H
H
H
H
L
X: ...
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