4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM - Mosel Vitelic Corp
Description
MOSEL VITELIC
V53C517405A 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM
V53C517405A
Max.
RAS Access Time, (tRAC) Max.
Column Address Access Time, (tCAA) Min.
Extended Data Out Page Mode Cycle Time, (tPC) Min.
Read/Write Cycle Time, (tRC)
50
50 ns 25 ns 20 ns 84 ns
60
60 ns 30 ns 25 ns 104 ns
Features
s 4M x 4-bit organization s EDO Page Mode for a sustained data rate of 50 MHz s RAS access time: 50, 60, 70 ns s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh s Refresh Interval: 2048 cycles/32 ms s Available in 24/26-pin 300 mil SOJ, and 24/26-pin 300 mil TSOP-II s Single +5 V ±10% Power Supply s TTL Interface
Description
The V53C517405A is a 4,194,304 x 4 bit highperformance CMOS dynamic random access memory.
The V53C517405A offers Page mode operation with Extended Data Output.
The V53C517405A has a symmetric address, 11-bit row and 11-bit column.
All inputs are TTL compatible.
EDO Page Mode operation allows random access up to 2048 x 4 bits, within a page, with cycle times as short as 20ns.
These features make the V53C517405A ideally suited for a wide variety of high performance computer systems and peripheral applications.
Device Usage Chart
Operating Temperature Range
0°C to 70°C
Package Outline K
•
Access Time (ns) 50
•
Power Std.
•
T
•
60
•
Temperature Mark
Blank
V53C517405A Rev.
1.
1 March 1998
1
MOSEL VITELIC
24/26 Pin Plastic SOJ /TSOP-II PIN CONFIGURATION Top View
VCC I/O1 I/O2 WE RAS NC A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 8 9 10 11 12 13 26 25 24 23 22 21 19 18 17 16 15 14
511740502-02
V53C517405A
Pin Names
A0–A10 RAS CAS Row, Column Address Inputs Row Address Strobe Column Address Strobe Write Enable Output Enable Data Input, Output +5V Supply 0V Supply No Connect
VSS I/O4 I/O3 CAS OE A9 A8 A7 A6 A5 A4 VSS
WE OE I/O1–I/O4 VCC VSS NC
Description SOJ TSOP-II
Pkg.
K T
Pin Count 24/26 24/26
V53C517405A Rev.
1.
1 March 1998
2
MOSEL VITELIC
Absolute Maximum Ratings*
Operating temperature range ...
Similar Datasheet
