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SAML21E16B

Microchip

ultra-low power microcontroller


SAML21E16B
SAML21E16B

PDF File SAML21E16B PDF File


Description
SAM L21 Family Data Sheet SAM L21 Introduction Atmel® SMART SAM L21 is a series of ultra-low power microcontrollers using 32-bit Arm® Cortex®-M0+ processor at maximum 48 MHz (2.
46 CoreMark®/MHz) and up to 256 KB Flash and 40 KB of SRAM in a 32-pin, 48-pin, and 64-pin packages.
The sophisticated power management technologies, such as power domain gating, SleepWalking, ultra-low power peripherals allow very low-power consumptions.
The highly configurable peripherals include a touch controller supporting capacitive interfaces with proximity sensing.
Features • Processor – Arm Cortex-M0+ CPU running at up to 48 MHz • Single-cycle hardware multiplier • Micro Trace Buffer • Memories – 32/64/128/256-KB in-system self-programmable Flash – 1/2/4/8-KB Flash Read-While-Write section – 4/8/16/32-KB SRAM main memory – 2/4/8/8-KB SRAM low-power memory • System – Power-on Reset (POR) and Brown-out Detection (BOD) – Internal and external clock options – External Interrupt Controller (EIC) – 16 external interrupts – One non-maskable interrupt – Two-pin Serial Wire Debug (SWD) programming, testing, and debugging interface • Low Power – Idle, Stand-by, Backup, and Off Sleep modes – SleepWalking peripherals – Static and Dynamic Power Gating Architecture – Battery backup support – Two performance levels – Embedded Buck/LDO regulator supporting on-the-fly selection • Peripherals – 16-channel Direct Memory Access Controller (DMAC) – 12-channel Event System – Up to five 16-bit Timer/Counters (TC) including one low-power TC, each configurable as: Complete Data Sheet © 2023 Microchip Technology Inc.
and its subsidiaries DS60001477E - 1 SAM L21 • 16-bit TC with two compare/capture channels • 8-bit TC with two compare/capture channels • 32-bit TC with two compare/capture channels, by using two TCs – Two 24-bit and one 16-bit Timer/Counters for Control (TCC), with extended functions: • Up to four compare channels with optional complementary output • Generation of synchronized pulse width mo...



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