N-Channel MOSFET
Description
SPN8632
N-Channel Enhancement Mode MOSFET
DESCRIPTION The SPN8632 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage application , notebook computer power management and other battery powered circuits where high-side switching .
FEATURES 30V/96A,RDS(ON)=4.
2mΩ@VGS=10V 30V/96A,RDS(ON)=6mΩ@VGS=4.
5V Super high density cell design for extremely low
RDS(ON) Exceptional on-resistance and maximum DC
current capability PPAK3x3-8L package design
APPLICATIONS MB/VGA/Vcore POL Applications SMPS 2nd SR
PIN CONFIGURATION(PPAK3x3-8L)
PART MARKING
2020/05/28 Ver 3
Page 1
SPN8632
N-Channel Enhancement Mode MOSFET
PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8
Symbol S S S G D D D D
ORDERING INFORMATION
Part Number
Package
SPN8632DN8RGB
PPAK3x3-8L
※ SPN8632DN8RGB : 13” Tape Reel ; Pb – Free; Halogen - Free
Description Source Source Source Gate Drain Drain Drain Drain
Part Marking SPN8632
ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage TC=25℃
Continuous Drain Current (Silicon Limited) TC=100℃
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
TC=25℃
Operating Junction Temperature
Storage Temperature Range Thermal Resistance-Junction to Ambient
Symbol VDSS VGSS
ID
IDM IS PD TJ TSTG RθJA
Typical 30
±20 96 68 120
30 7 -55/150 -55/150 62
Unit V V
A
A A W ℃ ℃ ℃/W
2020/05/28 Ver 3
Page 2
SPN8632
N-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS (TA=25℃ Unless otherwise noted)
Parameter
Symbol
Conditions
Static Drain-Source Breakdown Voltage Gate Threshold Voltage Gate Leakage Current
Zero Gate Voltage Drain Current
Drain-Source On-Resistance Forward Transconductance Diode Forward Voltage Dynamic Total Gate Charge Gate-Source Charge Gate...
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