3.3V Synchronous SRAMs
Description
128K X 36, 256K X 18 3.
3V Synchronous SRAMs 3.
3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect
IDT71V3577S IDT71V3579S IDT71V3577SA IDT71V3579SA
Features
◆ 128K x 36, 256K x 18 memory configurations ◆ Supports fast access times:
Commercial:
– 6.
5ns up to 133MHz clock frequency (TQFP package only)
Commercial and Industrial:
– 7.
5ns up to 117MHz clock frequency
– 8.
0ns up to 100MHz clock frequency
– 8.
5ns up to 87MHz clock frequency ◆ LBO input selects interleaved or linear burst mode ◆ Self-timed write cycle with global write control (GW), byte write
enable (BWE), and byte writes (BWx) ◆ 3.
3V core power supply ◆ Power down controlled by ZZ input ◆ 3.
3V I/O ◆ Optional - Boundary Scan JTAG Interface (IEEE 1149.
1
compliant) ◆ Packaged in a JEDEC Standard 100-pin plastic thin quad
flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball
grid array
Description
The IDT71V3577/79 are high-speed SRAMs organized as 128K x 36/256K x 18.
The ...
Similar Datasheet
