P-channel transistor
Description
DISCRETE SEMICONDUCTORS
DATA SHEET
BSS92 P-channel enhancement mode vertical D-MOS transistor
Product specification Supersedes data of April 1995 File under Discrete Semiconductors, SC13b 1997 Jun 19
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
FEATURES • Direct interface to C-MOS, TTL, etc.
• High-speed switching • No secondary breakdown.
APPLICATIONS • Line current interrupter in telephony applications • Relay, high speed and line transformer drivers.
DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 (SOT54) variant package.
handbook, halfpage
BSS92
PINNING - TO-92 (SOT54) variant PIN 1 2 3 SYMBOL g d s DESCRIPTION gate drain source
d
1
2 3 g
MAM144
s
Fig.
1 Simplified outline and symbol.
QUICK REFERENCE DATA SYMBOL VDS VGSO ID RDSon Ptot yfs PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) drain-source on-state resistance total power dissipation forward transfer admittance ID = −100 mA; VGS = −10 V Tamb ≤ 25 °C VDS = −25 V; ID = −100 mA open drain CONDITIONS MIN.
− − − − − 60 TYP.
− − − 10 − 200 MAX.
−240 ±20 −150 20 1 − V V mA Ω W mS UNIT
1997 Jun 19
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL VDS VGSO ID IDM Ptot Tstg Tj PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature Tamb ≤ 25 °C; note 1 open drain CONDITIONS − − − − − −55 − MIN.
BSS92
MAX.
−240 ±20 −150 −600 1 +150 150 V V
UNIT
mA mA W °C °C
THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient note 1 CONDITIONS VALUE 125 UNIT K/W
Note to the Limiting values and Thermal characteristics 1.
Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for drai...
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