Document
Datasheet
M16C/5L Group, M16C/56 Group
RENESAS MCU
R01DS0035EJ0110 Rev.1.10
Sep 01, 2011
1. Overview
1.1 Features
The M16C/5L and M16C/56 Group’s microcomputers (MCUs) are single-chip control units that utilize high-performance silicon gate CMOS technology with the M16C/60 Series CPU core. The M16C/5L Group and M16C/56 Group are available in 64-pin and 80-pin plastic molded LQFP packages. The MCUs employ sophisticated instructions for a high level of efficiency and they are capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier and DMAC for high-speed operation processing which makes it adequate for controlling office equipment, home appliances, and industrial equipment. The M16C/5L Group has one CAN module, which makes it suitable for automotive control, and factory automation LAN system.
1.1.1 Applications
Automotive, car audio, factory automation LAN system, etc.
R01DS0035EJ0110 Rev.1.10 Sep 01, 2011
Page 1 of 112
M16C/5L Group, M16C/56 Group
1. Overview
1.2 Specifications
Table 1.1 to Table 1.4 list specifications of the M16C/5L Group, M16C/56 Group.
Table 1.1 Specifications (80-pin Package) (1/2)
Item CPU
Function
Specification
M16C/60 Series CPU Core (Multiplier: 16 × 16 32 bits, Multiply-accumulate unit: 16 × 16 + 32 32 bits))
• Basic instructions: 91 Central processing unit • Minimum instruction execution time:
31.25 ns (f(BCLK) = 32 MHz, VCC = 3.0 to 5.5 V)
• Operating mode: Single-chip mode
Memory
ROM, RAM, data flash See Table 1.5 and Table 1.6.
Voltage Detection
Voltage detector
• 2 voltage detect points
Clock
Clock generator
• 5 circuits (Main clock, sub clock, PLL frequency synthesizer, 125 kHz on-
chip oscillator, 40 MHz on-chip oscillator)
• Oscillation stop detector: Main clock oscillator stop/restart detection • Frequency divide circuit: Divide-by-1, 2, 4, 8, or 16 selectable • Low-power consumption modes: Wait mode, stop mode • Real-time clock
I/O Ports
Programmable I/O ports
• 71 CMOS inputs/outputs, a pull-up resistor selectable
Interrupts
• Interrupt vectors: 70 • External interrupt inputs: 11 (NMI, INT × 6, key input × 4) • Interrupt priority levels: 7
Watchdog Timer
• 15 bits × 1 (with prescaler) • Automatic reset start function selectable • Dedicated 125 kHz on-chip oscillator for the watchdog timer contained
DMA
DMAC
• 4 channels, Cycle-steal transfer mode • Trigger sources: 41 • Transfer modes: 2 (single transfer, repeat transfer)
Timer A
16-bit timer × 5 Timer mode, event counter mode, one-shot timer mode, pulse-width modulation (PWM) mode Two-phase pulse signal processing in event counter mode (two-phase encoder input) × 3 Programmable output mode × 3
Timers
Timer B
16-bit timer × 3 Timer mode, event counter mode, pulse frequency measurement mode, pulse-width measurement mode
Timer function for three- Three-phase motor control timer × 1 (timers A1, A2, A4, and B2 used) phase motor control On-chip dead time timer
Timer S (Input captu.