HD74ALVC2G74

HD74ALVC2G74 Single D-type Flip Flops with Preset and Clear REJ03D0169–0300Z (Previous ADE-205-639B (Z)) Rev.3.00 Dec.18.2003 Description The HD74ALVC2G74 has independent data, preset, clear, and clock inputs Q and Q outputs in an 8 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features The basic gate function is lined up as Renesas uni logic series. Supplied on emboss taping for high-speed automatic mounting. Supply voltage range : 1.2 to 3.6 V Operating temperature range: −40 to +85°C All inputs VIH (Max.) = 3.6 V (@VCC = 0 V to 3.6 V) All outputs VO (Max.) = 3.6 V (@VCC = 0 V) Output current ±2 mA (@VCC = 1.2 V) ±4 mA (@VCC = 1.4 V to 1.6 V) ±6 mA (@VCC = 1.65 V to 1.95 V) ±18 mA (@VCC = 2.3 V to 2.7 V) ±24 mA (@VCC = 3.0 V to 3.6 V) Ordering Information Part Name Package Type Package Code Package Abbreviation HD74ALVC2G74USE SSOP-8 pin TTP-8DBV US Taping Abbreviation (Quantity) E (3,000 pcs/reel) Rev.3.00, Dec.18.2003, page 1 of 10 HD74ALVC2G74 Outline and Article Indication HD74ALVC2G74 Index band Lot No. YMW A74 Y : Year code (the last digit of year) M : Month code W : Week code SSOP-8 Marking Function Table Inputs Outputs PRE CLR CLK D Q Q L HXXHL HL XXL H L L X X H *1 H *1 HH↑ HHL HH↑ L L H H H ...