Document
Register Map: Section 6.2
Features
Four Input Clocks One crystal/CMOS input Two differential/CMOS inputs One single-ended/CMOS input Any input frequency from 9.72MHz to 1250MHz (9.72MHz to 300MHz for CMOS) Clock selection by pin or register control
Low-Jitter Fractional-N APLL and 3 Outputs Any output frequency from <1Hz to 1035MHz High-resolution fractional frequency conversion with 0ppm error Easy-to-configure, encapsulated design requires no external VCXO or loop filter components Each output has independent dividers Output jitter as low as 0.16ps RMS (12kHz20MHz integration band) Outputs are CML or 2xCMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Per-output supply pin with CMOS output voltages from 1.5V to 3.3V
ZL30250, ZL30251
4-Input, 3-Output Any-to-Any Clock Multiplier and Frequency Synthesizer ICs
Data Sheet
March 2015
Ordering Information
ZL30250LDG1 ZL30250LDF1 ZL30251LDG1 ZL30251LDF1
32 Pin QFN 32 Pin QFN 32 Pin QFN 32 Pin QFN
Trays Tape and Reel Trays Tape and Reel
Matte Tin
Package size: 5 x 5 mm
-40C to +85C
Precise output alignment circuitry and peroutput phase adjustment
Per-output enable/disable and glitchless start/stop (stop high or low)
General Features
Automatic self-configuration at power-up from external (ZL30250) or internal (ZL30251) EEPROM; up to four configs, pin-selectable
SPI or I2C processor Interface Numerically controlled oscillator mode Spread-spectrum modulation mode
Tiny 5x5mm QFN package
Easy-to-use evaluation software
Applications
Frequency conversion and frequency synthesis in a wide variety of equipment types
IC1P, IC1N
HSDIV1
APLL
HSDIV1
DIV1
IC2P, IC2N
HSDIV2
~3.7 to 4.2GHz,
IC3P/GPIO3 XA
xtal
HSDIV3
NCO SS
Fractional-N Figure 6
HSDIV2
DIV2 DIV3
XB driver ×2
Microprocessor Port
(SPI or I2C Serial) and HW Control and Status Pins
OC1P, OC1N VDDO1 OC2P, OC2N VDDO2 OC3P, OC3N VDDO3
RSTN AC0/GPIO0 AC1/GPIO1 TEST/GPIO2 IC3P/GPIO3
IF0/CSN IF1/MISO SCL/SCLK SDA/MOSI
Figure 1 - Functional Block Diagram
1
Microsemi Confidential
Copyright 2015. Microsemi Corporation. All Rights Reserved.
ZL30250, ZL30251
Data Sheet
Table of Contents
1. APPLICATION EXAMPLES .......................................................................................................... 5
2. DETAILED FEATURES................................................................................................................. 5
2.1 INPUT CLOCK FEATURES .............................................................................................................. 5 2.2 APLL FEATURES .......................................................................................................................... 5 2.3 OUTPUT CLOCK FEATURES ........................................................................................................... 5 2.4 GENERAL FEATURES ...........