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SI53314

Silicon Laboratories

1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR

Si53314 1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX AND INDIVIDUAL OE (<1.25 GHZ) Features  ...


Silicon Laboratories

SI53314

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Description
Si53314 1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX AND INDIVIDUAL OE (<1.25 GHZ) Features  6 differential or 12 LVCMOS outputs  Independent VDD and VDDO:  Ultra-low additive jitter: 45 fs rms 1.8/2.5/3.3 V  Wide frequency range:  1.2/1.5 V LVCMOS output support dc to 1.25 GHz  Excellent power supply noise  Universal input with pin selectable rejection (PSRR) output formats  LVPECL, Low Power LVPECL,  Selectable LVCMOS drive strength to tailor jitter and EMI performance LVDS, CML, HCSL, LVCMOS  Small size: 32-QFN (5x5 mm)  2:1 mux with hot-swappable inputs  RoHS compliant, Pb-free  Individual output enable  Industrial temperature range: –40 to +85 °C Applications  High-speed clock distribution  Ethernet switch/router  Optical Transport Network (OTN)  SONET/SDH  PCI Express Gen 1/2/3  Storage  Telecom  Industrial  Servers  Backplane clock distribution Ordering Information: See page 27. Pin Assignments Si53314 OE1 9 Q1 CLK0 10 Q1 CLK0 11 Q2 OE2 12 Q2 OE3 13 Q3 CLK1 14 Q3 CLK1 15 Q4 OE4 16 Q4 25 26 27 28 29 30 31 32 Description The Si53314 is an ultra low jitter six output differential buffer with pin-selectable output clock signal format and individual OE. The Si53314 features a 2:1 mux making it ideal for redundant clocking applications. The Si53314 utilizes Silicon Laboratories' advanced CMOS technology to fanout clocks from dc to 1.25 GHz with guaranteed low additive jitter, low skew, and low propagatio...




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