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SI52112-B5

Silicon Laboratories

PCI-EXPRESS GEN 3 DUAL OUTPUT CLOCK GENERATOR

Si52112-B5/B6 PCI-EXPRESS GEN 3 DUAL OUTPUT CLOCK GENERATOR Features  PCI-Express Gen 1, Gen 2,  Triangular spread...


Silicon Laboratories

SI52112-B5

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Description
Si52112-B5/B6 PCI-EXPRESS GEN 3 DUAL OUTPUT CLOCK GENERATOR Features  PCI-Express Gen 1, Gen 2,  Triangular spread spectrum Gen 3, and Gen 4 common clock profile for maximum EMI compliant reduction (Si52112-B6)  Gen 3 SRNS Compliant  Extended Temperature:  Low power HCSL differential –40 to 85 °C output buffers  3.3 V Power supply  Supports Serial-ATA (SATA) at  Small package 10-pin TDFN 100 MHz (3x3 mm)  No termination resistors required  Si52112-B5 does not support  25 MHz Crystal Input or Clock spread spectrum outputs input  Si52112-B6 supports 0.5% down spread outputs Applications  Network attached storage  Multi-function printer  Wireless access point  Routers Description Si52112-B5/B6 is a high-performance, PCIe clock generator that can source two PCIe clocks from a 25 MHz crystal or clock input. The clock outputs are compliant to PCIe Gen 1, Gen 2, Gen 3, Gen 3 SRNS and Gen 4 common clock specifications. The ultra-small footprint (3x3 mm) and industry leading low power consumption make Si52112-B5/B6 the ideal clock solution for consumer and embedded applications. Measuring PCIe clock jitter is quick and easy with the Silicon Labs PCIe Clock Jitter Tool. Download it for free at www.silabs.com/pcie-learningcenter. Ordering Information: See page 13 Pin Assignments VDD 1 XOUT 2 XIN/CLKIN 3 VSS 4 VSS 5 10 VDD 9 DIFF2 8 DIFF2 7 DIFF1 6 DIFF1 Patents pending Functional Block Diagram VDD XIN/CLKIN XOUT PLL Divider DIFF1 DIFF2 ...




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