Document
NCT3012S
Nuvoton Advanced Power Control IC
NCT3012S
Nuvoton Confidential
Publication Date: Jul., 2009 Revision A0
-I-
NCT3012S
-TABLE OF CONTENTS-
1. GENERAL DESCRIPTION ......................................................................................................... 1 2. FEATURES ................................................................................................................................. 2 3. BLOCK DIAGRAM ...................................................................................................................... 3 4. PIN CONFIGURATION ............................................................................................................... 4 5. PIN DESCRIPTION..................................................................................................................... 5 6. CONTROL AND STATUS REGISTER ....................................................................................... 7
6.1 Deep Sleep Enable Control Register (DPSENCTRL) .................................................... 7 6.2 Deep S5 Delay Time Control (DELAYCTRL) ................................................................. 8 6.3 Chip and Version ID Register (CVID) ............................................................................. 8 7. ELECTRICAL CHARACTERISTIC ............................................................................................. 9 7.1 ABSOLUTE MAXIMUM RATINGS ................................................................................. 9 7.2 DC CHARACTERISTICS................................................................................................ 9 7.3 AC CHARACTERISTICS.............................................................................................. 10 8. TYPICAL APPLICATION REFERENCE CIRCUIT ................................................................... 11 9. PACKAGE SPECIFICATIONS.................................................................................................. 12 10. ORDERING INFORMATION..................................................................................................... 13 11. TOP MARKING SPECIFICATIONS.......................................................................................... 13 12. REVISION HISTORY ................................................................................................................ 14
Nuvoton Confidential
Publication Date: Jul., 2009 Revision A0
- II -
NCT3012S
1. GENERAL DESCRIPTION
The NCT3012S is Nuvoton’s advanced power control IC which is specifically designed for desktop, notebook and any embedded system applications. The NCT3012S provides a mechanism to further lower the total system power consumption while the system is in S5 state. The NCT3012S could block the entire system standby power that comes from the ATX power supplier while the system is in S5 state, and it is fulfilled via the control of the external transistor. The NCT3012S is the only active IC under that circumstance so the total system power consumption is minimized. The system standby power could be resumed by the pushing of the external power button. The NCT3012S is powered by the 5VSB from the ATX power supplier, and communicates with the system through 2-wire System Management Bus (SMBusTM) serial interface. The package is 8-pin ESOP green package.
Nuvoton Confidential
Publication Date: Jul., 2009 Revision A0
-1-
NCT3012S
2. FEATURES
2.1 General Description z IC Communication Interface: I2C® Compatible System Management Bus (SMBusTM) Serial Interface z IC Operation Power Source: 5 Volt VSB Power from ATX Power Supply z Supports ACPI (Advanced Configuration and Power Interface) Power Sequence z Supports Programmable Configuration Settings z Supports Deep S5 Power Saving Control
2.2 PACKAGE z SOP-8 150mil with Exposed Pad Package z Lead Free (ROHS Compliant) and Halogen Free SOP-8
2.3 APPLICATION z Desktop and Notebook Computers z Servers z Embedded Applications
Nuvoton Confidential
Publication Date: Jul., 2009 Revision A0
-2-
3. BLOCK DIAGRAM
NCT3012S
POR
SMBus Interface
Control Logic & Configuration
Register
ACPI State Machine
I/O Buffer
I/O Buffer
Nuvoton Confidential
Publication Date: Jul., 2009 Revision A0
-3-
4. PIN CONFIGURATION
z NCT3012S PIN CONFIGURATION
NCT3012S
DeepS5_Sel 1 VSB 2
PS_IN# 3 SLP_S5# 4
9. GND
8 SYS5VSB_OFF 7 PS_OUT# 6 SCLK 5 SDA
NCT3012S (Top View)
Nuvoton Confidential
Publication Date: Jul., 2009 Revision A0
-4-
NCT3012S
5. PIN DESCRIPTION
z PIN TYPE DESCRIPTION
PIN TYPE
PIN ATTRIBUTE
I/OD12TS
TTL level and schmitt trigger open drain output with 12 mA sink capability
I/O12TS I/OD12
TTL level and schmitt trigger with 12 mA source and sink capability Bi-directional pin and open-drain output with 12mA sink capability
OD12
Open-drain output pin with 12 mA sink capability
INTS TTL level input pin and schmitt trigger AIN Input pin (Analog)
AOUT
Output pin (Analog)
IN Input pin
OUT
Output pin
P Po.