Document
A5821
BiMOS II 8-Bit Serial Input Latched Driver
Discontinued Product
These parts are no longer in production The device should not be purchased for new design applications. Samples are no longer available.
Date of status change: October 31, 2005
Recommended Substitutions:
For new customers or new applications, refer to the A6821.
NOTE: For detailed information on purchasing options, contact your local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
Data Sheet 26185.12F
5821
CLOCK 1 CLK
SERIAL DATA IN
2
LOGIC 3 GROUND
LOGIC SUPPLY
4
VDD
SERIAL DATA OUT
5
STROBE 6 ST
OUTPUT ENABLE
7
OE
POWER 8
GROUND
SUB
SHIFT REGISTER LATCHES
16 OUT 1 15 OUT2 14 OUT 3 13 OUT4 12 OUT5 11 OUT6 10 OUT7 9 OUT8
Dwg. PP-026A
Note the DIP package and the SOIC package are electrically identical and share common terminal number assignments.
ABSOLUTE MAXIMUM RATINGS at 25°C Free-Air Temperature
Output Voltage, VOUT ..................... 50 V Logic Supply Voltage, VDD ............. 15 V Input Voltage Range,
VIN .................. -0.3 V to VDD + 0.3 V Continuous Output Current,
IOUT ..................................... 500 mA Package Power Dissipation, PD
Package Code ‘A’ .................. 2.1 W Package Code ‘LW’ ............... 1.5 W
Operating Temperature Range, TA ............................ -20°C to +85°C
Storage Temperature Range, TS .......................... -55°C to +150°C
Caution: CMOS devices have input static protection but are susceptible to damage when exposed to extremely high static electrical charges.
BiMOS II 8-BIT SERIAL-INPUT, LATCHED DRIVERS
A merged combination of bipolar and MOS technology gives these devices an interface flexibility beyond the reach of standard logic buffers and power driver arrays. The UCN5821A and UCN5821LW each have an eight-bit CMOS shift register and CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sinking Darlington output drivers.
BiMOS II devices have much higher data-input rates than the original BiMOS circuits. With a 5 V logic supply, they will typically operate at better than 5 MHz. With a 12 V supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS and NMOS logic levels. TTL circuits may require the use of appropriate pull-up resistors. By using the serial data output, the drivers can be cascaded for interface applications requiring additional drive lines.
The UCN5821A are furnished in a standard 16-pin plastic DIP; the UCN5821LW .