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D780053 Dataheets PDF



Part Number D780053
Manufacturers NEC
Logo NEC
Description UPD780053
Datasheet D780053 DatasheetD780053 Datasheet (PDF)

User’s Manual µPD780058, 780058Y Subseries 8-Bit Single-Chip Microcontrollers µPD780053 µPD780053Y µPD780054 µPD780054Y µPD780055 µPD780055Y µPD780056 µPD780056Y µPD780058 µPD780058BY µPD780058B µPD78F0058Y µPD78F0058 µPD780053Y(A) µPD780053(A) µPD780054Y(A) µPD780054(A) µPD780055Y(A) µPD780055(A) µPD780056Y(A) µPD780056(A) µPD780058BY(A) µPD780058B(A) Document No. U12013EJ3V2UD00 (3rd edition) Date Published February 2003 N CP (K) Printed in Japan 1997, 2003 [MEMO] 2 User'.

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Document
User’s Manual µPD780058, 780058Y Subseries 8-Bit Single-Chip Microcontrollers µPD780053 µPD780053Y µPD780054 µPD780054Y µPD780055 µPD780055Y µPD780056 µPD780056Y µPD780058 µPD780058BY µPD780058B µPD78F0058Y µPD78F0058 µPD780053Y(A) µPD780053(A) µPD780054Y(A) µPD780054(A) µPD780055Y(A) µPD780055(A) µPD780056Y(A) µPD780056(A) µPD780058BY(A) µPD780058B(A) Document No. U12013EJ3V2UD00 (3rd edition) Date Published February 2003 N CP (K) Printed in Japan 1997, 2003 [MEMO] 2 User's Manual U12013EJ3V2UD NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. FIP, EEPROM, and IEBus are trademarks of NEC Electronics Corporation. Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/AT is a trademark of International Business Machines Corporation. HP9000 Series 700 and HP-UX are t.


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