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CAT24C128 Dataheets PDF



Part Number CAT24C128
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description 128kb I2C CMOS Serial EEPROM
Datasheet CAT24C128 DatasheetCAT24C128 Datasheet (PDF)

EEPROM Serial 128-Kb I2C CAT24C128 Description The CAT24C128 is a EEPROM Serial 128−Kb I2C internally organized as 16,384 words of 8 bits each. It features a 64−byte page write buffer and supports both the Standard (100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol. Write operations can be inhibited by taking the WP pin High (this protects the entire memory). On−Chip ECC (Error Correction Code) makes the device suitable for high reliability applications.* Features • Supports Standard,.

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EEPROM Serial 128-Kb I2C CAT24C128 Description The CAT24C128 is a EEPROM Serial 128−Kb I2C internally organized as 16,384 words of 8 bits each. It features a 64−byte page write buffer and supports both the Standard (100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol. Write operations can be inhibited by taking the WP pin High (this protects the entire memory). On−Chip ECC (Error Correction Code) makes the device suitable for high reliability applications.* Features • Supports Standard, Fast and Fast−Plus I2C Protocol • 1.8 V to 5.5 V Supply Voltage Range • 64−Byte Page Write Buffer • Hardware Write Protection for Entire Memory • Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs (SCL and SDA) • Low Power CMOS Technology • 1,000,000 Program/Erase Cycles • 100 Year Data Retention • Industrial and Extended Temperature Range • This Device is Pb−Free, Halogen Free/BFR Free and RoHS Compliant** VCC SCL A2, A1, A0 WP CAT24C128 SDA VSS Figure 1. Functional Symbol ** For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com UDFN−8 HU4 SUFFIX CASE 517AZ TSSOP−8 Y SUFFIX CASE 948AL SOIC−8 W SUFFIX CASE 751BD SOIC−8 WIDE X SUFFIX CASE 751BE PIN CONFIGURATION 1 A0 VCC A1 WP A2 SCL VSS SDA SOIC (W), TSSOP (Y), UDFN (HU4) For the location of Pin 1, please consult the corresponding package drawing. PIN FUNCTION Pin Name† Function A0, A1, A2 SDA Device Address Inputs Serial Data Input/Output SCL Serial Clock Input WP Write Protect Input VCC Power Supply VSS Ground †The exposed pad for the TDFN/UDFN packages can be left floating or connected to Ground. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. © Semiconductor Components Industries, LLC, 2013 1 July, 2020 − Rev. 17 Publication Order Number: CAT24C128/D CAT24C128 Table 1. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units Storage Temperature −65 to +150 °C Voltage on Any Pin with Respect to Ground (Note 1) −0.5 to +6.5 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. The DC input voltage on any pin should not be lower than −0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may undershoot to no less than −1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns. Table 2. RELIABILITY CHARACTERISTICS (Note 2) Symbol Parameter Min Units NEND (Notes 3, 4) Endurance 1,000,000 Program / Erase Cycles TDR Data Retention 100 Years 2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. 3. Page Mode, VCC = 5 V, 25°C 4. The new product revision (C) uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when a single byte has to be written, 4 bytes (including the ECC bits) are re−programmed. It is recommended to write by multiple of 4 bytes in order to benefit from the maximum number of write cycles. www.onsemi.com 2 CAT24C128 Table 3. D.C. OPERATING CHARACTERISTICS (VCC = 1.8 V to 5.5 V, TA = −40°C to +85°C and VCC = 2.5 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.) Symbol Parameter Test Conditions Min Max ICCR ICCW ISB IL VIL1 VIL2 VIH1 VIH2 VOL1 VOL2 Read Current Write Current Standby Current I/O Pin Leakage Input Low Voltage Input Low Voltage Input High Voltage Input High Voltage Output Low Voltage Output Low Voltage Read, fSCL = 400 kHz/1 MHz All I/O Pins at GND or VCC Pin at GND or VCC 2.5 V ≤ VCC ≤ 5.5 V 1.8 V ≤ VCC < 2.5 V 2.5 V ≤ VCC ≤ 5.5 V 1.8 V ≤ VCC < 2.5 V VCC ≥ 2.5 V, IOL = 3.0 mA VCC < 2.5 V, IOL = 1.0 mA TA = −40°C to +85°C TA = −40°C to +125°C TA = −40°C to +85°C TA = −40°C to +125°C −0.5 −0.5 0.7 VCC 0.75 VCC 1 3 2 5 1 2 0.3 VCC 0.25 VCC VCC + 0.5 VCC + 0.5 0.4 0.2 Units mA mA mA mA V V V V V V Table 4. PIN IMPEDANCE CHARACTERISTICS (VCC = 1.8 V to 5.5 V, TA = −40°C to +85°C and VCC = 2.5 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.) Symbol Parameter Conditions Max Units CIN (Note 5) SDA I/O Pin Capacitance VIN = 0 V 8 pF CIN (Note 5) Input Capacitance (other pins) VIN = 0 V 6 pF IWP, IA (Note 6) WP Input Current, Address Input Current (A0, A1, A2) VIN < VIH, VCC = 5.5 V VIN < VIH, VCC = 3.3 V 75 mA 50 VIN < VIH, VCC = 1.8 V 25 VIN > VIH 2 5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100 and JEDEC test methods. 6. W.


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