Document
SH79F166A
Enhanced 8051 Microcontroller with 10bit ADC
1. Features
8bits micro-controller with Pipe-line structured 8051 compatible instruction set
Flash ROM: 16K Bytes RAM: internal 256 Bytes, external 256 Bytes, LCD RAM
19Bytes EEPROM-like: 1K Bytes Operation Voltage:
fOSC = 32.768kHz - 12MHz, VDD = 2V - 5.5V Oscillator (code option)
- Crystal oscillator: 32.768kHz - Crystal oscillator: 2MHz - 12MHz - Ceramic oscillator: 2MHz - 12MHz - Internal RC: 12MHz (±2%)/128K 41 CMOS bi-directional I/O pins Built-in pull-up resistor for input pin Four 16-bit timer/counters T2, T3,T4 and T5 One 12-bit PWM Powerful interrupt sources: - Timer2, 3, 4, 5 - INT0, 1, 2, 3 - INT40, INT41, INT42, INT43 - ADC,EUART,SCM
- PWM
EUART 8channels 10-bits Analog Digital Converter (ADC),
with comparator function built-in Buzzer LED driver:
- 8 X 8 dots (1/8 duty) - 4 X 8 dots (1/4 duty) LCD driver: - 8 X 19 dots (1/8 duty 1/4 bias) - 4 X 19 dots (1/4 duty 1/3 bias) Low Voltage Reset (LVR) function (enabled by code option) - LVR voltage level 1: 4.3V - LVR voltage level 2: 2.1V CPU Machine cycle: 1 oscillator clock Watch Dog Timer (WDT) Warm-up Timer Support Low power operation modes: - Idle Mode - Power-Down Mode Flash Type Package: QFP44/LQFP44
2. General Description
The SH79F166A is a high performance 8051 compatible micro-controller, regard to its build-in Pipe-line instruction fetch structure, that helps the SH79F166A can perform more fast operation speed and higher calculation performance, if compare SH79F166A with standard 8051 at same clock speed.
The SH79F166A retains most features of the standard 8051. These features include internal 256 bytes RAM, UART and Int0-3.In addition, the SH79F166A provides external 256 bytes RAM, It also contains 16K bytes Flash memory block both for program and data. Also the ADC and PWM timer functions are incorporated in SH79F166A.
For high reliability and low cost issues, the SH79F166A builds in Watchdog Timer, Low Voltage Reset function. And SH79F166A also supports two power saving modes to reduce power consumption.
1 V2.2
3. Block Diagram
VDD
Power
Pipelined 8051 architecture
16K Bytes Flash ROM
Internal 256 Bytes External 256 Bytes (Exclude System
Register)
Timer2 (16bit) Timer3 (16bit) Timer4 (16bit) Timer5(16bit)
XTAL1 XTAL2 XTALX1 XTALX2
External Interrupt
12-bit PWM
Internal Oscillator
Oscillator
Oscillator X buzzer
oscillator fail detector
Reset circuit
Watch Dog
Port 5 Configuration I/Os
Port 4 Configuration I/Os
Port 3 Configuration I/Os
Port 2 Configuration I/Os
Port 1 Configuration I/Os
Port 0 Configuration I/Os
EUART0
10-bit ADC
LCD/LED Driver
Jtag ports (for debug)
SH79F166A
RST
P5.0 - P5.3 P4.0 - P4.4 P3.0 - P3.7 P2.0 - P2.7 P1.0 - P1.7 P0.0 - P0.7
COM1 - 8 SEG1 - 19
2
4. Pin Configuration
QFP44:
SH79F166A
P1.6/SEG7/LED_S7 P1.5/SEG6/LED_S6 P1.4/SEG5/LED_S5 P1.3/SEG4/LED_S4/TCK P1.2/SEG3/LED_S3/TDI P1.1/SEG2/LED_S2/TMS P1.0/SEG1/LED_S1/TDO P3.0/COM1/LED_.