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TC74ACT373FT Dataheets PDF



Part Number TC74ACT373FT
Manufacturers Toshiba Semiconductor
Logo Toshiba Semiconductor
Description Octal D-Type Latch
Datasheet TC74ACT373FT DatasheetTC74ACT373FT Datasheet (PDF)

TC74ACT373P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT373P, TC74ACT373F, TC74ACT373FT Octal D-Type Latch with 3-State Output The TC74ACT373 is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing.

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TC74ACT373P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT373P, TC74ACT373F, TC74ACT373FT Octal D-Type Latch with 3-State Output The TC74ACT373 is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS output voltage levels. These 8-bit D-type latches are controlled by a latch enable (LE) and a output enable input ( OE ). When the ( OE ) input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 5.2 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 8 μA (max) at Ta = 25°C • Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min) • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines. • Balanced propagation delays: tpLH ∼− tpHL • Pin and function compatible with 74F373 TC74ACT373P TC74ACT373F TC74ACT373FT Weight DIP20-P-300-2.54A SOP20-P-300-1.27A TSSOP20-P-0044-0.65A : 1.30 g (typ.) : 0.22 g (typ.) : 0.08 g (typ.) Start of commercial production 1988-10 1 2014-03-01 Pin Assignment TC74ACT373P/F/FT IEC Logic Symbol OE 1 Q0 2 D0 3 D1 4 Q1 5 Q2 6 D2 7 D3 8 Q3 9 GND 10 20 VCC 19 Q7 18 D7 17 D6 16 Q6 15 Q5 14 D5 13 D4 12 Q4 11 LE OE (1) EN LE (11) C1 D0 (3) 1D D1 (4) D2 (7) D3 (8) D4 (13) D5 (14) D6 (17) D7 (18) (top view) Truth Table Inputs OE LE D H X X L L X L H L L H H Output Q Z Qn L H X: Don’t care Z: High impedance Qn: Q outputs are latched at the time when the LE input is taken to a low logic level. System Diagram (2) Q0 (5) Q1 (6) Q2 (9) Q3 (12) Q4 (15) Q5 (16) Q6 (19) Q7 11 LE D0 3 D D1 4 D D2 7 D D3 D4 D5 D6 D7 8 13 14 17 18 D D D D D Q Q Q Q Q Q Q Q L L L L L L L L 1 OE 2 Q0 5 Q1 6 Q2 9 Q3 12 Q4 15 Q5 16 Q6 19 Q7 2 2014-03-01 TC74ACT373P/F/FT Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature VCC VIN VOUT IIK IOK IOUT ICC PD Tstg −0.5 to 7.0 V −0.5 to VCC + 0.5 V −0.5 to VCC + 0.5 V ±20 mA ±50 mA ±50 mA ±200 mA 500 (DIP) (Note 2)/180 (SOP/TSSOP) mW −65 to 150 °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C should be applied up to 300 mW. Operating Ranges (Note) Characteristics Symbol Rating Unit Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time VCC VIN VOUT Topr dt/dV 4.5 to 5.5 0 to VCC 0 to VCC −40 to 85 0 to 10 V V V °C ns/V Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 3 2014-03-01 TC74ACT373P/F/FT Electrical Characteristics DC Characteristics Characteristics High-level input voltage Low-level input voltage High-level output voltage Symbol VIH VIL VOH Low-level output voltage VOL 3-state output off-state current IOZ Input leakage current IIN ICC Quiescent supply current IC Test Condition ― Ta = 25°C Ta = −40 to 85°C Unit VCC (V) Min Typ. Max Min Max 4.5 to 5.5 2.0 ― ― 2.0 ― V ― 4.5 to 5.5 ― ― 0.8 ― 0.8 V VIN IOH = −50 μA 4.5 = VIH or IOH = −24 mA 4.5 VIL IOH = −75 mA (Note) 5.5 VIN IOL = 50 μA 4.5 = VIH or IOL = 24 mA 4.5 VIL IOL = 75 mA (Note) 5.5 VIN = VIH or VIL 5.5 VOUT = VCC or GND VIN = VCC or GND 5.5 4.4 4.5 ― 4.4 ― 3.94 ― ― 3.80 ― V ― ― ― 3.85 ― ― 0.0 0.1 ― 0.1 ― ― 0.36 ― 0.44 V ― ― ― ― 1.65 ― ― ±0.5 ― ±5.0 μA ― ― ±0.1 ― ±1.0 μA VIN = VCC or GND Per input: VIN = 3.4 V Other input: VCC or GND 5.5 ― ― 8.0 .


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