Octal 3-State Non-Inverting D Flip-Flop
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Non-Inverting D Flip-Flop
High–Performance Silicon–Gate CMOS
The MC...
Description
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Non-Inverting D Flip-Flop
High–Performance Silicon–Gate CMOS
The MC54/74HC374A is identical in pinout to the LS374. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
Data meeting the setup time is clocked to the outputs with the rising edge of the clock. The Output Enable input does not affect the states of the flip–flops, but when Output Enable is high, the outputs are forced to the high–impedance state; thus, data may be stored even when the outputs are not enabled.
The HC374A is identical in function to the HC574A which has the input pins on the opposite side of the package from the output. This device is similar in function to the HC534A which has inverting outputs.
Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard
No. 7A Chip Complexity: 266 FETs or 66.5 Equivalent Gates
LOGIC DIAGRAM
DATA INPUTS
D0 3 D1 4
D2 7 D3 8 D4 13
D5 14 D6 17 D7 18
CLOCK 11
2 Q0 5 Q1 6 Q2 9 Q3 12 Q4 15 Q5 16 Q6 19 Q7
NONINVERTING OUTPUTS
OUTPUT ENABLE 1
PIN 20 = VCC PIN 10 = GND
FUNCTION TABLE
Output Enable
L L L H
Inputs Clock
L,H, X
Output
DQ HH LL X No Change XZ
X = don’t care Z = high impedance
8/96
© Motorola, Inc. 1996
3–1
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