74ALVCH16244

74ALVCH16244 LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS s 3.6V TOLERANT INPUTS AND OUTPUTS s HIGH SPEED : tPD = 3.0 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 3.7 ns (MAX.) at VCC = 2.3 to 2.7V tPD = 5.1 ns (MAX.) at VCC = 1.65V )s POWER DOWN PROTECTION ON INPUTS t(sAND OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: uc|IOH| = IOL = 24mA (MIN) at VCC = 3.0V d|IOH| = IOL = 12mA (MIN) at VCC = 2.3V ro )|IOH| = IOL = 4mA (MIN) at VCC = 1.65V P t(ss OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V te cs BUS HOLD PROVIDED ON DATA INPUTS le dus PIN AND FUNCTION COMPATIBLE WITH so ro74 SERIES 16244 s LATCH-UP PERFORMANCE EXCEEDS b P300mA (JESD 17) - O tes ESD PERFORMANCE: ) leHBM > 2000V (MIL STD 883 method 3015); t(s oMM > 200V c bsDESCRIPTION u OThe 74ALVCH16244 is a low voltage CMOS 16 rod -BIT BUS BUFFER (NON INVERTED) fabricated P t(s)with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power te cand very high speed 1.65 to 3.6V applications; it le ucan be interfaced to 3.6V signal environment for dboth inputs and outputs. so roAny nG output control governs four BUS b PBUFFERS. Output Enable input (nG) tied together gives full 16-bit operation. O teWhen nG is LOW, the outputs are enabled. When lenG is HIGH, the output are in high impedance ostate. sActive bus-hold circuitry is provided to hold Obunused or floating data inputs at a valid logic level. TSSOP ORDER CODES PACKAGE TSSOP TUBE PIN CONNECTION ...