Document
Final Data Sheet
IPB180P04P4L-02
OptiMOS®-P2 Power-Transistor
Product Summary V DS R DS(on),max ID
-40 V 2.4 mW -180 A
Features • P-channel - Logic Level - Enhancement mode • AEC qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green Product (RoHS compliant) • 100% Avalanche tested • Intended for reverse battery protection
Type IPB180P04P4L-02
Package PG-TO263-7-3
Marking 4QP04L02
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Conditions
Continuous drain current
ID
T C=25°C, V GS=-10V1)
T C=100°C, V GS=-10V2)
Pulsed drain current2)
I D,pulse T C=25°C
Avalanche energy, single pulse
E AS I D= -90A
Avalanche current, single pulse
I AS -
Gate source voltage
V GS
-
Power dissipation
P tot T C=25°C
Operating and storage temperature T j, T stg -
IEC climatic category; DIN IEC 68-1 -
-
PG-TO263-7-3
Gate Pin 1
Drain Pin 4, Tab
Source Pin 2, 3, 5, 6, 7
Value
-180
-140
-720 84 -180 ±163) 150 -55 ... +175 55/175/56
Unit A
mJ A V W °C
Rev. 1.3
page 1
2011-04-27
Final Data Sheet
IPB180P04P4L-02
Parameter
Symbol
Conditions
Thermal characteristics2)
Thermal resistance, junction - case SMD version, device on PCB
R thJC R thJA
minimal footprint 6 cm2 cooling area4)
min.
Values typ.
Unit max.
- - 1 K/W - - 62 - - 40
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0V, I D= -1mA
-40
-
-V
Gate threshold voltage
V GS(th) V DS=V GS, I D=-410µA -1.2 -1.7 -2.2
Zero gate voltage drain current
I DSS
V DS=-32V, V GS=0V, T j=25°C
-
-0.1 -1 µA
Gate-source leakage current Drain-source on-state resistance
V DS=-32V, V GS=0V, T j=125°C2)
I GSS
V GS=-16V, V DS=0V
R DS(on) V GS=-4.5V, I D=-100A V GS=-10V, I D=-100A
-
-
-20 -200
- -100 nA 2.6 3.9 mW 1.8 2.4
Rev. 1.3
page 2
2011-04-27
Final Data Sheet
IPB180P04P4L-02
Parameter
Dynamic characteristics2) Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time
Gate Charge Characteristics2) Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage
Reverse Diode Diode continous forward current2) Diode pulse current2)
Diode forward voltage
Reverse recovery time2)
Symbol
Conditions
min.
Values typ.
Unit max.
C iss C oss Crss
V GS=0V, V DS=-25V, f =1MHz
- 14400 18700 pF - 4570 5900 - 180 360
t d(on)
- 32 - ns
t r V DD=-20V,
- 28 -
V GS=-10V, I D=-180A,
t d(off)
R G=3.5W
- 146 -
t f - 119 -
Q gs Q gd Qg V plateau
V DD=-32 V, I D=-180 A, V GS=0 to -10 V
- 50 65 nC - 38 76 - 220 286 - -3.5 - V
IS I S,pulse
T C=25°C
V SD
V GS=0V, I F=-100A, T j=25°C
t rr
V R=-20V, I F=-50A, di F/dt =-100A/µs
- - -180 A - - -720 - -1.0 -1.3 V
- 71 - ns
Reverse recovery charge2)
Q rr
- 101 - nC
1) Current is limited by bondwire; with an R thJC = 1K/W the chip is able to carry 200A at 25°C.
2) Specified by design. Not subject to production test.
3) VGS=+5V/-16V according AEC; VGS=+16V for max 168h at TJ=175°C 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air.
Rev. 1.3
page 3
2011-04-27
Final Data Sheet
IPB180P04P4L-02
1 Power dissipation P tot = f(T C); V GS ≤ -6V
2 Drain current I D = f(T C); V GS ≤ -6V
P tot [W] -I D [A]
160
140
120
100
80
60
40
20
0 0 50 100 T C [°C]
3 Safe operating area I D = f(V DS); T C = 25 °C; D = 0 parameter: t p
1000
200
190
180
170
160
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
150 200
0
50 100 150 T C [°C]
1 µs 10 µs
4 Max. transient thermal impedance Z thJC = f(t p) parameter: D =t p/T
101
200
-I D [A] Z thJC [K/W]
100
10
1 0.1
Rev. 1.3
1 ms
100 µs
100
0.5
1 10 -V DS [V]
0.1
10-1
0.01
0.05
10-2
single pulse
10-3
100
10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
page 4
2011-04-27
Final Data Sheet
IPB180P04P4L-02
-I D [A] R DS(on) [mW]
5 Typ. output characteristics I D = f(V DS); T j = 25°C parameter: V GS
700
-10 V
-5 V
600
500
400
300
200
100
0 01234 -V DS [V]
7 Typ. transfer characteristics I D = f(V GS); V DS = -6V parameter: T j
700
6 Typ. drain-source on-state resistance R DS(on) = f(I D); T j = 25°C parameter: V GS
20
-2.8 V
18
-3 V
-3.5 V
-4.5 V
16
14
12
-4 V 10 8
-3.5 V
-3 V
56
6
4
2
0 0
-4 V -4.5 V -10 V
50 100 -I D [A]
150
8 Typ. drain-source on-state resistance R DS(on) = f(T j); I D = -100A; V GS = -10V
3
600
2.5 500
-I D [A] R DS(on) [mW]
400 2
300
200
100
175 °C 25 °C -55 °C
0 0123456 -V GS [V]
1.5
1 -60 -20 20 60 100 140 180
T j [°C]
Rev. 1.3
page 5
2011-04-27
Final Data Sheet
IPB180P04P4L-02
9 Typ. gate threshold voltage V GS(th) = f(T j); V GS = V DS parameter: I D
2.25
10 Typ. capacitances C = f(V DS); V GS = 0 V; f = 1 MHz
-V GS(th) [V] C [pF]
2 1.75
1.5 1.25
1
-410µA
-4100µA
104 103 102
Ciss Coss
Crss
0.75 -60 -20 20 60 100 140 1.