Document
1. Features
MDT13P02
The followings are some of the features on the hardware and software : Special designed MCU for USB+PS/2 Meet low-speed (1.5Mbps) USB spec Version 1.1 Support 1 device address and 3 endpoints Working with Agilent ADNS-2610, ADNS-2620, ADNS-2051, ADNS-5020 or PixArt PAN101B, PAN3101
optical mouse sensor Fully CMOS static design 8-bit data bus On chip EPROM size: 2.5 K words Internal RAM size: 80 bytes 37 single word instructions 14-bit instructions 8-level stacks Operating voltage: 4.0 V ~ 5.25 V External oscillator frequency: 6-MHz/18-MHz/24-MHz Internal operation frequency: 12-MHz Addressing modes include direct, indirect and relative addressing modes Power-on Reset Power edge-detector Reset Sleep Mode for power saving 4 interrupt sources: -TMR0 timer -USB Endpoint 0 -USB Endpoint 1 -USB Endpoint 2 TMR0: 8-bit timer 2 types of oscillator can be selected by programming option: XTAL-Standard crystal oscillator HFXT-High frequency crystal oscillator On-chip RC oscillator based Watchdog Timer (WDT) 16 I/O pins with their own independent direction control
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P. 2
2007/8 Ver. 1.0
2. Pin Assignment
PA6 1 PB5/CLKO 2 PB6/SCLK 3 PB7/SDIO 4
PA0/L 5 PA1/M 6
VSS 7 PA2/PWRC 8
PA3/R 9 OSC1 10
20 PA7 19 PB4/Z2 18 PB3/Z1 17 PB2/PD 16 PB1/K5 15 PB0/K4 14 PA5/DP/CLK 13 PA4/DM/DATA 12 VDD 11 OSC2
PB6/SCLK 1 PB7/SDIO 2
PA0/L 3 PA1/M 4
VSS 5 PA2/PWRC 6
PA3/R 7 OSC1 8
16 PB4/Z2 15 PB3/Z1 14 PB1/K5 13 PB0/K4 12 PA5/DP/CLK 11 PA4/DM/DATA 10 VDD 9 OSC2
PB5/CLKO 1 PB6/SCLK 2 PB7/SDIO 3
PA0/L 4 PA1/M 5
VSS 6 PA2/PWRC 7
PA3/R 8 OSC1 9
MDT13P02
18 PB4/Z2 17 PB3/Z1 16 PB2/PD 15 PB1/K5 14 PB0/K4 13 PA5/DP/CLK 12 PA4/DM/DATA 11 VDD 10 OSC2
3. Pin Function Description
Pin Name PB0/K4 PB1/K5 PB2/PD
PB3/Z1
PB4/Z2
PB5/CLKO
PB6/SCLK
I/O Function Description
I/O Port B bit 0/Button 4/Optional internal 80K pull-up resistor I/O Port B bit 1/Button 5/Optional internal 80K pull-up resistor I/O Port B bit 2/PD signal for photo sensor/Optional internal 80K
pull-up resistor I/O Port B bit 3/Input for Z1 axis/Optional internal 30K pull-down
resistor mode I/O Port B bit 4/Input for Z2 axis/Optional internal 30K pull-down
resistor I/O Port B bit 5/Oscillation clock output for photo sensor/Optional
internal 80K pull-up resistor I/O Port B bit 6/Serial clock to Agilent sensor/Optional internal 80K
pull-up resistor
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P. 3
2007/8 Ver. 1.0
Pin Name PB7/SDIO
PA0/L PA1/M PA2/PWR_C PA3/R PA4/DM/DATA
PA5/DP/CLK
PA6 PA7 OSC1 OSC2 VDD VSS
MDT13P02
I/O Function Description I/O Port B bit 7/Serial data from Agilent sensor/Optional internal 80K
pull-up resistor I/O Port A bit 0/Left button input/Internal 80K pull-up resistor I/O Port A bit 1/Middle button input/Internal 80K pull-up resistor I/O Port A bit 2/Power control/Internal 80K Pull-up/Open drain output I/O Port A bit 3/Right button input/Internal 80K pull-up resistor I/O USB D- or PS/2 data
USB mode need 7.5K pull-up resistor to VDD I/O USB D+ or PS/2 clock
Port A bit 5 for PS2 mode internal 7.5K pull-up resistor I/O Port A bit 6/Internal 80K Pull-up I/O Port A bit 7/Internal 80K Pull-up
I Oscillator Input O Oscillator Output
Power supply Ground
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P. 4
2007/8 Ver. 1.0
4. Memory Map
(A) Register Map
Address BANK0
00 01 02 03 04 05 06 0A 0B 25 26 27 28 29 2A 2B 2C 30~67 68~6F 70~77 78~7F BANK1 01 05 06
Description
Indirect Addressing Register TMR0 PCL STATUS0 MSR Port A Port B PCHLAT INTCON0 EP2TXC EP0TXC EP1TXC USBDA USBSCR EP0RXS INTCON1 STATUS1 General purpose register USB FIFO ENDPOINT2 USB FIFO ENDPOINT0 USB FIFO ENDPOINT1
OPTION CPIOA CPIOB
MDT13P02
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P. 5
2007/8 Ver. 1.0
MDT13P02
(1) IAR (Indirect Address Register): R00 Addressing this location will use the content of MSR to address data memory (not a physical register)
(2) TMR0: R01
(3) PC (Program Counter): R02, R0A (4) STATUS (Status register): R03
Bit Symbol
0 C Carry bit 1 HC Half Carry bit 2 Z Zero bit 3 /PF Power down bit 4 /TF WDT timer overflow bit 5 RP0 Register Bank select bit
0: 00h~7Fh (Bank0) 1: 80h~FFh (Bank1) 7~6 -- General purpose bit
Function
(5) MSR (Memory Bank Select Register): R04
Memory Bank Select Register: 0: 00h~7Fh (Bank0) 1: 80h~FFh (Bank1)
b7 b6 b5 b4 b3 b2 b1 b0
(6) PORT A: R05 PA7~PA0, PORTA data register
(7) PORT B: R06 PB7~PB0, PORTB data register
Indirect Addressing Mode
(8) PCHLAT: R0A Write buffer for the upper 4 bits of the Program counter
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P. 6
2007/8 Ver. 1.