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R5F563NDDGFB Dataheets PDF



Part Number R5F563NDDGFB
Manufacturers Renesas
Logo Renesas
Description 100-MHz 32-bit RX MCU
Datasheet R5F563NDDGFB DatasheetR5F563NDDGFB Datasheet (PDF)

Features RX63N Group, RX631 Group Renesas MCUs R01DS0098EJ0180 100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, up to 2-MB flash memory, various communications interfaces including Ethernet MAC, Rev.1.80 May 13, 2014 full-speed USB 2.0 host/function/OTG interface, CAN, 10- & 12-bit A/D converters, RTC Features RX63N Group products incorporate an Ethernet controller while RX631 Group products do not. ■ 32-bit RX CPU core  Max. operating frequency: 100 MHz  Capable of 165 DMIPS in operatio.

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Features RX63N Group, RX631 Group Renesas MCUs R01DS0098EJ0180 100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, up to 2-MB flash memory, various communications interfaces including Ethernet MAC, Rev.1.80 May 13, 2014 full-speed USB 2.0 host/function/OTG interface, CAN, 10- & 12-bit A/D converters, RTC Features RX63N Group products incorporate an Ethernet controller while RX631 Group products do not. ■ 32-bit RX CPU core  Max. operating frequency: 100 MHz  Capable of 165 DMIPS in operation at 100 MHz  Single precision 32-bit IEEE-754 floating point  Two types of multiply-and-accumulation unit (between memories and between registers)  32-bit multiplier (fastest instruction execution takes one CPU clock cycle)  Divider (fastest instruction execution takes two CPU clock cycles)  Fast interrupt  CISC Harvard architecture with 5-stage pipeline  Variable-length instructions: Ultra-compact code  Supports the memory protection unit (MPU)  JTAG and FINE (two-line) debugging interfaces ■ Low-power design and architecture  Operation from a single 2.7- to 3.6-V supply  Low power consumption: A product that supports all peripheral functions draws only 500 μA/MHz.  RTC is capable of operation from a dedicated power supply (min. operating voltage: 2.3 V).  Four low-power modes ■ On-chip main flash memory, no wait states  Supports ROM-less versions and versions with up to 2 Mbytes of ROM (ROMless/256 Kbytes/384 Kbytes/512 Kbytes: RX631 Group only)  100-MHz operation, 10-ns read cycle (no wait states)  768-Kbyte to 2-Mbyte capacities  User code is programmable by on-board or off-board programming ■ On-chip data flash memory  ROM-less or 32 Kbytes of ROM (reprogrammable up to 100,000 times)  Programming/erasing as background operations (BGOs) ■ On-chip SRAM, no wait states  64 Kbytes/128 Kbytes/192 Kbytes/256 Kbytes of SRAM  For instructions and operands  Can provide backup on deep software standby ■ DMA  DMAC: Four channels  DTC  EXDMAC: Two channels  Dedicated DMAC for the Ethernet controller: Single channel ■ Reset and supply management  Power-on reset (POR)  Low voltage detection (LVD) with voltage settings ■ Clock functions  External crystal oscillator or internal PLL for operation at 4 to 16 MHz  Internal 125-kHz LOCO and 50-MHz HOCO  125-kHz clocks for the IWDT ■ Real-time clock  Adjustment functions (30 seconds, leap year, and error)  Time capture function (for capturing times in response to event-signal input on external pins) ■ Independent watchdog timer  125-kHz LOCO clock operation ■ Useful functions for IEC60730 compliance  Oscillation-stoppage detection, frequency measurement, CRC, IWDT, selfdiagnostic function for the A/D converter, etc. PLQP0176KB-A 24 × 24 mm, 0.5-mm pitch PLQP0144KA-A 20 × 20 mm, 0.5-mm pitch PLQP0100KB-A 14 × 14 mm, 0.5-mm pitch PLQP0064KB-A 10 × 10 mm, 0.5-mm pitch PLQP0048KB-A 7 × 7 mm, 0.5-mm pitch PTLG0177KA-A 8 × 8 mm, 0.5-mm pitch PTLG0145KA-A 7 × 7 mm, 0.5-mm pitch PTLG0100JA-A 7 × 7 mm, 0.65-mm pitch PTLG0064JA-A 6 × 6 mm, 0.65-mm pitch PLBG0176GA-A 13 × 13mm, 0.8-mm pitch ■ Various communications interfaces  Ethernet MAC (1) (not in RX631 Group products)  Host/function or OTG controller (1) and function controller (1) with full- speed USB 2.0 transfer  CAN (compliant with ISO11898-1), incorporating 32 mailboxes (up to 3 modules)  SCI with multiple functionalities (up to 13)  Choose from among asynchronous mode, clock-synchronous mode, smart- card interface mode, simplified SPI, simplified I2C, and extended serial mode. I2C bus interface for transfer at up to 1 Mbps (up to 4)  RSPI for high-speed transfer (up to 3)  Parallel data capture unit (PDC) (1) (available for 512 Kbytes/384 Kbytes/ 256 Kbytes flash memory with 177-pin, 176-pin, 145-pin, and 144-pin) ■ External address space  Buses for high-speed data transfer (max. operating frequency of 50 MHz)  8 CS areas (8 × 16 Mbytes)  Multiplexed bus or separate bus are selectable per area.  8-, 16-, or 32-bit bus space is selectable per area  Independent SDRAM area (128 Mbytes) ■ Up to 20 extended-function timers  16-bit MTU2: input capture, output compare, PWM waveform output, phase-counting mode (6 channels)  16-bit TPU: input capture, output compare, phase-counting mode (12 channels)  8-bit TMR (4 channels)  16-bit compare-match timers (4 channels) ■ A/D converter for 1-MHz Operation  Up to 21 × 12-bit channels, and incorporating 1 sample-and-hold circuit Up to 8 × 10-bit channels, and incorporating 1 sample-and-hold circuit  Addition of results of A/D conversion (in the 12-bit converter)  Self diagnosis (for the 10-bit converter) ■ 10-bit D/A converter: 2 channels ■ Temperature sensor for measuring temperature within the chip ■DEU  AES encryption and decryption functions  128/192/256-bit key length  ECB/CBC mode ■ Register write protection can protect values in important registers against overwriting. ■ Up to 134 pins for general I/O ports  5-V tolerance, open drai.


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