Document
NCP5080
Xenon Photoflash Capacitor Charge with Photo Sense Interface
The NCP5080 product is a high voltage boost driver dedicated to the Xenon power flashes.
The built-in DC/DC converter is based on a flyback structure with an external transformer to adapt any range of high voltage demand. The external feedback network makes it possible to dynamically adjust of the output voltage.
Features
•ă2.7 V to 5.5 V Input Voltage Range •ăXenon Function Fully Supported •ăBuilt-in Short Circuit Protection •ăDedicated Photo Flash Trigger Pin •ăProvides IGBT drive •ăEmbedded Photodiode Sense •ăAdjustable Primary Ipeak Current •ăThis is a Pb-Free Device
Typical Applications
•ăDigital Camera Photo Flash •ăDigital Cellular Phone Camera Photo Flash •ăLow Power Beacon
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MARKING DIAGRAM
1
LLGA12 CASE 513AD
XXXXX XXXXX ALYWG
G
A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
PHREF 1 TRGFL 2
IGBT 3 VBAT 4 PGND 5 VSW 6
12 PHSEN 11 VHB 10 IPKRF 9 AGND 8 READY 7 EN
ORDERING INFORMATION
Device
Package
Shipping†
+VBAT GND
+VBAT
R6 D6
1k READY S2 EN
ENABLE S1
TRGFL TRIGGER
12 XENON TUBE
11k R5
NCP5080MUTXG LLGA12 3000 / Tape & Reel (Pb-Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
GND
+VBAT
C2 10mF/6.3V
GND
U1 READY8 READY
VBAT 4 2 T1
4
C3 22mF/315V
D1 14
BAS21-B
GND
7 EN 2 TRGFL 1 PHREF 12 PHSEN
10 IPK-REF
13
GND
Vsw 6
COILCRAFT-CJ5143-AL
GND PGND 5
R12
IGBT 3
R7 10k
VHT
R3
X1 3
220k
T2
FLTRG-TB-KR8
13
C4
Ns Np 47nF/400V
2
9 AGNG NCP5080
VFB 11 R1
33R R2
8G VHT
GND 1 34 Collector Q1 Emitter IGBT-CY25BAH-8F
GND
GND
12k C1
10nF
3.0M
Figure 1. Typical NCP5080 Photo Flash Application
76 5 GND
©Ă Semiconductor Components Industries, LLC, 2007
July, 2007 - Rev. 1
1
Publication Order Number: NCP5080/D
NCP5080
+VBAT
VBAT 4
UVLO Thermal Shutdown Boost Driver +Vbat
READY 8
EN
TRGFL
PHREF PHSEN IPKREF
AGND
7
2 100k
1 100k 12 10 9
GND GND GND
Controller
6 Vsw
Q1
GND Vbat
5 PGND
3 Buffer
GND 11
IGBT VFB
GND Figure 2. NCP5080 Simplified Block Diagram
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NCP5080
PIN DESCRIPTIONS
PIN Name
Type
Description
1
PHREF
INPUT, The external controller biases this pin with the reference voltage used, together with the PHSEN
ANALOG pin, to control the illumination of the photo scene. The VPH voltage shall be in the 0.5 V to 1.5 V range, capable to support the internal resistor network (R load minimum is 500 kW). The photo
sense function is deactivated when 0.5 V v PHREF v 1.5 V and PHSEN = GND (see Table 4).
2
TRGFL
INPUT, A positive going pulse applied to this pin triggers the external IGBT and the flash sequence takes
DIGITAL place. This command is active when EN = High, but is not synchronized with the output voltage
value (see Table 4).
3
IGBT
OUTPUT, This pin provides the signal to drive the external IGBT and can be forced High or Low independ‐
POWER ently of the output voltage value, (assuming EN = High) according to the TRGFL pin status (see
Table 4). Depending upon the type of IGBT used in the application, specific external gate network
might be necessary to satisfy the IGBT gate drive conditions.
4
VBAT
INPUT, This pin carries the power supply to the analog, digital and DC/DC converter blocks and must be
POWER decoupled to ground by a 10 mF ceramic capacitor connected as close as possible to the package.
5
PGND
POWER This pin is the GROUND return for the DC/DC converter and must be connected to the system
ground, a ground plane is strongly recommended.
6
VSW
OUTPUT, This pin is the drain of the internal NMOS device and shall be connected to the primary of the
POWER external transformer. Care must be observed, at PCB layout level, to minimize the noise due to the
large current and voltage transients present on that pin during normal operation.
7 EN INPUT, This pin controls the operation of the boost converter:
DIGITAL EN = Low ³ The DC/DC converter is OFF, no flash can take place, the voltage across the external reservoir capacitor depends solely upon the leakage current present in the environment.
EN = High ³ The DC/DC converter is activated, the voltage across the external reservoir capacitor is regulated at the predetermined value according to the VFB reference. Similarly, a flash can take place, assuming the Xenon tube is properly biased.
8 READY OUTPUT, This Open Drain Output goes LOW when the output voltage has reached the predetermined value
DIGITAL
across the external reservoir capacitor. The signal is HIGH when Vout is below the expected value, or if a fault has been detected at chip level.
9
AGND
POWER This pin returns the Analog and Digital blocks ground and must be connected to the external
ground plane.
10 IPKREF INPUT, This pin provides the setup of the peak current flowing into the primar.