Document
Rev. 1.2, May. 2010 M378B5773CH0 M391B5773CH0 M378B5273CH0 M391B5273CH0
240pin Unbuffered DIMM based on 2Gb C-die
78FBGA with Lead-Free & Halogen-Free (RoHS compliant)
datasheet
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Unbuffered DIMM
datasheet
History Draft Date Dec. 2009 Jan. 2010
Rev. 1.2
DDR3 SDRAM
Revision History
Revision No. 1.0 1.1 - First Release - Changed DIMM IDD Definition - Added DIMM IDD Specification - Deleted operation frequency of 800Mbps 6-6-6 1.11 1.12 1.2 - Corrected Typo. - Corrected Typo. - Changed Module line-up Mar. 2010 May. 2010 May. 2010 S.H.Kim S.H.Kim S.H.Kim Remark Editor S.H.Kim S.H.Kim
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Unbuffered DIMM
datasheet
Rev. 1.2
DDR3 SDRAM
Table Of Contents
240pin Unbuffered DIMM based on 2Gb C-die
1. DDR3 Unbuffered DIMM Ordering Information ............................................................................................................. 4 2. Key Features................................................................................................................................................................. 4 3. Address Configuration .................................................................................................................................................. 4 4. x64 DIMM Pin Configurations (Front side/Back side) ................................................................................................... 5 5. x72 DIMM Pin Configurations (Front side/Back side) ................................................................................................... 6 6. Pin Description ............................................................................................................................................................. 7 7. SPD and Thermal Sensor for ECC UDIMMs ................................................................................................................ 7 8. Input/Output Functional Description.............................................................................................................................. 8 8.1 Address Mirroring Feature ....................................................................................................................................... 9 8.1.1. DRAM Pin Wiring Mirroring .............................................................................................................................. 9 9. Function Block Diagram: ............................................................................................................................................... 10 9.1 2GB, 256Mx64 Non ECC Module (Populated as 1 rank of x8 DDR3 SDRAMs) ..................................................... 10 9.2 2GB, 256Mx72 ECC Module (Populated as 1 rank of x8 DDR3 SDRAMs) ............................................................ 11 9.3 4GB, 512Mx64 Non ECC Module (Populated as 2 ranks of x8 DDR3 SDRAMs) ................................................... 12 9.4 4GB, 512Mx72 ECC Module (Populated as 2 ranks of x8 DDR3 SDRAMs)........................................................... 13 10. Absolute Maximum Ratings ........................................................................................................................................ 14 10.1 Absolute Maximum DC Ratings............................................................................................................................. 14 10.2 DRAM Component Operating Temperature Range .............................................................................................. 14 11. AC & DC Operating Conditions................................................................................................................................... 14 11.1 Recommended DC Operating Conditions (SSTL-15)............................................................................