SEN04G64D2BC2MT-xxR

preliminary Data Sheet Rev.0.9 12.07.2013 4GB DDR2 – SDRAM SO-DIMM Features: 200 Pin SO-DIMM SEN04G64D2BC2MT-xx[W]R 4GByte in FBGA Technology RoHS compliant Options: Data Rate / Latency DDR2 667 MT/s CL5 DDR2 800 MT/s CL6  Module Density 4GByte with 16 dies and 2 ranks Standard Grade Grade W (TA) (TC) (TA) (TC) 0°C to 70°C 0°C to 85°C -40°C to 85°C -40°C to 95°C Marking -30 -25          200-pin 64-bit Small Outline, Dual-In-Line Double Data Rate Synchronous DRAM Module Module organization: dual rank 512M x 64 VDD = 1.8V ±0.1V, VDDQ 1.8V ±0.1V 1.8V I/O ( SSTL_18 compatible) Auto Refresh (CBR) and Self Refresh 8k Refresh every 64ms Serial Presence Detect with EEPROM Gold-contact pad This module is fully pin and functional compatible to the JEDEC PC2-6400 spec. and JEDEC- Standard MO-224. (see www.jedec.org) The pcb and all components are manufactured according to the RoHS compliance specification [EU Directive 2002/95/EC Restriction of Hazardous Substances (RoHS)] DDR2 - SDRAM component Micron MT47H256M8EB-25E:C 256Mx8 DDR2 SDRAM in FBGA-60 package Four bit prefetch architecture DLL to align DQ and DQS transitions with CK Eight internal device banks for concurrent operation Programmable CAS latency (CL) Posted CAS additive latency (AL) WRITE latency = READ latency – 1 tCK Programmable burst length: 4 or 8 Adjustable data-output drive strength On-die termination (ODT)             * The refresh rate has to be doubled when 85°C>TC>95°C Environmental Re...