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HB52R1289E22-A6B Dataheets PDF



Part Number HB52R1289E22-A6B
Manufacturers Elpida Memory
Logo Elpida Memory
Description 1 GB Registered SDRAM DIMM 1 GB Registered SDRAM DIMM (36 pcs of 64 M 4 Components) PC100 SDRAM
Datasheet HB52R1289E22-A6B DatasheetHB52R1289E22-A6B Datasheet (PDF)

HB52R1289E22-A6B/B6B 1 GB Registered SDRAM DIMM 128-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 64 M × 4 Components) PC100 SDRAM E0017H20 (Ver. 2.0) Aug. 20, 2001 (K) Description The HB52R1289E22 belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed as an optimized main memory solution for 8-byte processor applications. The HB52R1289E22 is a 64M × 72 × 2-bank Synchronous Dynamic RAM Module, mounted 36 pieces of 256-Mbit SDRAM (HM5225405BTB) sealed i.

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HB52R1289E22-A6B/B6B 1 GB Registered SDRAM DIMM 128-Mword × 72-bit, 100 MHz Memory Bus, 2-Bank Module (36 pcs of 64 M × 4 Components) PC100 SDRAM E0017H20 (Ver. 2.0) Aug. 20, 2001 (K) Description The HB52R1289E22 belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed as an optimized main memory solution for 8-byte processor applications. The HB52R1289E22 is a 64M × 72 × 2-bank Synchronous Dynamic RAM Module, mounted 36 pieces of 256-Mbit SDRAM (HM5225405BTB) sealed in TCP package, 1 piece of PLL clock driver, 3 pieces register driver and 1 piece of serial EEPROM (2-kbit) for Presence Detect (PD). An outline of the HB52R1289E22 is 168-pin socket type package (dual lead out). Therefore, the HB52R1289E22 makes high density mounting possible without surface mount technology. The HB52R1289E22 provides common data inputs and outputs. Decoupling capacitors are mounted beside TCP on the module board. Note: Do not push the cover or drop the modules in order to protect from mechanical defects, which would be electrical defects. Features • Fully compatible with : JEDEC standard outline 8-byte DIMM : Intel PCB Reference design (Rev. 1.2) • 168-pin socket type package (dual lead out)  Outline: 133.37 mm (length) × 38.10 mm (Height) × 4.80 mm (Thickness)  Lead pitch: 1.27 mm • 3.3 V power supply • Clock frequency: 100 MHz (max) • LVTTL interface • Data bus width: × 72 ECC • Single pulsed RAS • 4 Banks can operates simultaneously and independently • Burst read/write operation and burst read/single write operation capability • Programmable burst length: 1/2/4/8 Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd. HB52R1289E22-A6B/B6B • 2 variations of burst sequence  Sequential  Interleave • Programmable CE latency : 3/4 (HB52R1289E22-A6B) : 4 (HB52R1289E22-B6B) • Byte control by DQMB • Refresh cycles: 8192 refresh cycles/64 ms • 2 variations of refresh  Auto refresh  Self refresh Ordering Information Type No. HB52R1289E22-A6B HB52R1289E22-B6B Frequency 100 MHz 100 MHz CE latency 3/4 4 Package Contact pad 168-pin dual lead out socket type Gold Pin Arrangement 1 pin 10 pin 11 pin 40 pin 41 pin 84 pin 85 pin 94 pin 95 pin 124 pin 125 pin 168 pin Data Sheet E0017H20 2 HB52R1289E22-A6B/B6B Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Pin name VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 CB0 CB1 VSS NC NC VCC W DQMB0 DQMB1 S0 NC VSS A0 A2 A4 Pin No. 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 Pin name VSS NC S2 DQMB2 DQMB3 NC VCC NC NC CB2 CB3 VSS DQ16 DQ17 DQ18 DQ19 VCC DQ20 NC NC NC VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 Pin No. 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 Pin name VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VCC DQ46 DQ47 CB4 CB5 VSS NC NC VCC CE DQMB4 DQMB5 S1 RE VSS A1 A3 A5 Pin No. 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 Pin name VSS CKE0 S3 DQMB6 DQMB7 NC VCC NC NC CB6 CB7 VSS DQ48 DQ49 DQ50 DQ51 VCC DQ52 NC NC REGE VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 Data Sheet E0017H20 3 HB52R1289E22-A6B/B6B Pin No. 36 37 38 39 40 41 42 Pin name A6 A8 A10 (AP) BA1 VCC VCC CK0 Pin No. 78 79 80 81 82 83 84 Pin name VSS CK2 NC WP SDA SCL VCC Pin No. 120 121 122 123 124 125 126 Pin name A7 A9 BA0 A11 VCC CK1 A12 Pin No. 162 163 164 165 166 167 168 Pin name VSS CK3 NC SA0 SA1 SA2 VCC Pin Description Pin name A0 to A12 Function Address input Row address Column address BA0/BA1 DQ0 to DQ63 CB0 to CB7 S0 to S3 RE CE W DQMB0 to DQMB7 CK0 to CK3 CKE0 WP REGE* SDA SCL SA0 to SA2 VCC VSS NC Note: 1. REGE ≥ V IH: Register mode. REGE ≤ V IL: Buffer mode. 1 A0 to A12 A0 to A9, A11 BA0/BA1 Bank select address Data input/output Check bit (Data input/output) Chip select input Row enable (RAS) input Column enable (CAS) input Write enable input Byte data mask Clock input Clock enable input Write protect for serial PD Register/Buffer enable Data input/output for serial PD Clock input for serial PD Serial address input Primary positive power supply Ground No connection Data Sheet E0017H20 4 HB52R1289E22-A6B/B6B Serial PD Matrix*1 Byte No. Function described 0 1 2 3 4 5 6 7 8 9 Number of bytes used by module manufacturer Total SPD memory size Memory type Number of row addresses bits Number of column addresses bits Number of banks Module data width Module data width (continued) Module interface signal levels SDRAM cycle time (highest CE latency) 10 ns SDRAM access from Clock (highest CE latency) 6 ns Module configuration type Refresh rate/type Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments 1 0 0 0 0 0 0 0 0 1 0 0 .


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