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SSS2308 Dataheets PDF



Part Number SSS2308
Manufacturers South Sea Semiconductor
Logo South Sea Semiconductor
Description N-Channel MOSFET
Datasheet SSS2308 DatasheetSSS2308 Datasheet (PDF)

SSS2308 N-Channel Enhancement Mode MOSFET Product Summary VDS (V) ID (A) RDS(ON) (m ) Max D SOT-23 80 @VGS = 4.5V 20V 2.3A 110 @VGS = 2.5V G S D FEATURES Super high dense cell design for low RDS(ON). Rugged and reliable. SOT-23 package. S G ABSOLUTE MAXIMUM RATINGS (TA = 25 C unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous @ TC = 25 C -Pulsed b o o Symbol VDS VGS ID IDM a Limit 20 10 2.3 10 1.25 1.25 -55 to 150 Unit V V A A A W o Drai.

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SSS2308 N-Channel Enhancement Mode MOSFET Product Summary VDS (V) ID (A) RDS(ON) (m ) Max D SOT-23 80 @VGS = 4.5V 20V 2.3A 110 @VGS = 2.5V G S D FEATURES Super high dense cell design for low RDS(ON). Rugged and reliable. SOT-23 package. S G ABSOLUTE MAXIMUM RATINGS (TA = 25 C unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous @ TC = 25 C -Pulsed b o o Symbol VDS VGS ID IDM a Limit 20 10 2.3 10 1.25 1.25 -55 to 150 Unit V V A A A W o Drain-Source Diode Forward Current Maximum Power Dissipation a IS PD TJ, TSTG Operating Junction and Storage Temperature Range C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient a R JA 100 o C/W South Sea Semiconductor reserves the right to make changes to improve reliability or manufacturability without advance notice. South Sea Semiconductor, October 2006 (Rev 2.3) 1 SSS2308 Electrical Characteristics (TA = 25 C unless otherwise noted) Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate-Body Leakage Gate Threshold Voltage Drain-Source On-State Resistance o Symbol BVDSS IDSS IGSS VGS(th) RDS(ON) Condition VGS=0V, ID=250 A Min 20 Typ c Max Unit V VDS=16V, VGS=0V VGS= 10V, VDS=0V A 0.6 0.8 72.5 95 8.5 5.5 305 62 49 12 4 1 100 1.5 80 m 110 A nA V VDS=VGS ID=250 VGS=4.5V, ID=2.7A VGS=2.5V, ID=2.0A On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Diode Forward Voltage ID(ON) gFS CISS COSS CRSS tD(ON) tr tD(OFF) tf Qg Qgs Qgd VSD VDS=5V, VGS=4V VDS=5V, ID=2A VDS=15V VGS=0V f=1.0MHz VDD=10V, ID=1A, VGS=4.5V, RGEN=6 RL=10 VDS=10V, ID=2A, VGS=4.5V VGS=0V, ID=1.25A , A S PF ns 18 10 5 0.88 1.5 0.9 1.2 V nC Notes a. Surface Mounted on FR4 Board, t <10 - sec. b. Pulse Test Pulse Width < 300 s, Duty Cycle < - 2%. c. Guaranteed by design, not subject to production testing. 2 SSS2308 20 VGS = 10, 9, 8, 7, 6, 5V 25 ID, Drain Current (A) ID, Drain Current (A) 16 VGS = 4V VGS = 3V 12 20 Tj = 125 C 15 25 C 10 o o 8 4 VGS = 2V 0 0 1 2 3 4 5 6 5 -55 C 0 0 0.5 1 1.5 2 2.5 3 o VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Figure 1. Output Characteristics Figure 2. Thansfer Characteristics 1000 2.2 1.8 VGS = 4V VGS = 2.7A C, Capacitance (pF) 800 RDS(ON), On-Resistance Normalized ( ) 1.4 1.0 0.6 600 400 Ciss 200 Coss 0 0 0.2 0 Crss 5 10 15 20 25 30 -55 -25 0 25 50 75 100 125 VDS, Drain-to-Source Voltage (V) Tj, Junction Tempertature ( O C) Figure 3. Capacitance 1.3 Figure 4. On-Resistance Variation with Temperature 1.3 BVDSS, Normalized Drain-Source Breakdown Voltage Vth, Normalized Gate-Source Threshold Voltage 1.2 1.1 1.0 0.9 0.8 0.7 0 -50 VDS = VGS ID = 250 A ID = 250 1.2 A 1.1 1.0 0.9 0.8 0.7 -50 -25 0 25 50 75 100 o -25 0 25 50 75 o 100 125 125 Tj, Junction Temperature ( C) Tj, Junction Temperature ( C) Figure 5. Gate Threshold Variation with Temperature Figure 6. Breakdown Voltage Variation with Temperature 3 SSS2308 12 20.0 VDS = 5V 10 8 6 4 2 0 0 5 10 15 20 25 IS, Source-Drain Current (A) gFS, Transconductance (S) 10.0 1.0 TJ = 25 C 0.0 0.4 0.8 1.2 1.6 2.0 2.4 O IDS, Drain-Source Current (A) VSD, Body Diode Forward Voltage (V) Figure 7. Transconductance Variation with Drain Current 5 Figure 8. Body Diode Forward Voltage Variation with Source Current 50 VGS, Gate to Source Voltage (V) VDS = 4.5V ID = 2A ID, Drain Current (A) 4 10 RD S( ) ON Lim it 10 10 m 3 0m s s 1 1s DC 2 0.1 VGS = 4V Single Pulse o Tc = 25 C 0.01 0.1 1 10 20 50 1 0 0 0.7 1.4 2.1 2.8 3.5 4.2 4.9 5.6 Qg, Total Gate Charge (nC) VSD, Drain-to-Source Voltage (V) Figure 9. Gate Charge Figure 10. Maximum Safe Operating Area 4 SSS2308 VDD td(on) ton tr 90% toff td(off) 90% tf VIN D VGS RGEN G RL VOUT VOUT 10% INVERTED 10% 90% 50% 50% S VIN 10% PULSE WIDTH Figure 11. Switching Test Circuit Figure 12. Switching Waveforms 10 r(t), Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.0.5 0.02 0.01 Single Pulse 0.01 10 -5 10 -4 PDM t1 t2 1. R JA(t) = r(t)*R JA 2. R JA = see datasheet 3. TJM - TA = PDM*R JA(t) 4. Duty Cycle, D = t1/t2 10 -2 10 -3 10 -1 1 10 10 2 10 3 Square Wave Pulse Duration (sec) Figure 13. Normalized Thermal Transient Impedance Curve 5 .


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