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OP4018B Dataheets PDF



Part Number OP4018B
Manufacturers RF Monolithics
Logo RF Monolithics
Description Optical Timing Clock
Datasheet OP4018B DatasheetOP4018B Datasheet (PDF)

Preliminary OP4018B • • • • • Complies with Directive 2002/95/EC (RoHS) Pb Fundamental-Mode Oscillation at 718.864 MHz Quartz SAW Stabilized and Filtered “Diff Sine” Technology Voltage Tunable for Phase Lock Loop Operations Optical Timing Reference for Forward Error Correction Applications The output of this device is generated and filtered by narrowband quartz SAW elements at 718.864 MHz. The configuration of this clock is intended to provide a pure signal for optical timing applications in no.

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Preliminary OP4018B • • • • • Complies with Directive 2002/95/EC (RoHS) Pb Fundamental-Mode Oscillation at 718.864 MHz Quartz SAW Stabilized and Filtered “Diff Sine” Technology Voltage Tunable for Phase Lock Loop Operations Optical Timing Reference for Forward Error Correction Applications The output of this device is generated and filtered by narrowband quartz SAW elements at 718.864 MHz. The configuration of this clock is intended to provide a pure signal for optical timing applications in noisy signal environments. The Q/Qbar differential output swing of ±1 volt about 0 vdc has symmetry better than ±1% into loads from 40 ohms to 70 ohms; determined by customer application. The long term frequency accuracy is set by an external reference source allowing this device to complete a Phase Lock Loop design without the usual noise and jitter problems associated with PLL’s. 718.864 MHz Optical Timing Clock Absolute Maximum Ratings Rating DC Suppy Voltage Tune Voltage Case Temperature Value 0 to 5.5 0 to 6 -55 to 100 Units VDC VDC °C SMC-08 Electrical Characteristics Characteristic Absolute Frequency Tune Range Tune Voltage Tuning Linearity Modulation Bandwidth Tune DC resistance Deviation Slope Voltage into 50 Ω (VSWR≤1.2) Q and Q Output Operating Load VSWR Symmetry Harmonic Spurious Nonharmonic Spurious Phase Noise dBc/Hz@100Hz offset 1kHz offset 10k offset 100k offset Noise Floor Jitter RMS Jitter (10kHz to 80MHz) 200 mVP-P from 1MHz to ½ fO on VCC Output DC Resistance (between Q & Q) DC Power Supply Operating Voltage Operating Current Operating Ambient Temperature Lid Symbolization (YY=Year, WW=Week) Operating Frequency Sym fO Notes 1, 9 2 1 1, 8 Minimum ±50 1.8 ±5 100 100 150 0.6 49 Typical 718.863785 2.6 3 Maximum Units MHz ppm VDC % kHz KΩ ppm/volt VP-P % dBc dBc dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz PSP-P dBc KΩ VDC mA °C 3 5 250 VO 1,3 1,3 3, 4, 5 3, 4, 6 3, 4, 6, 7 -70 -100 -125 -140 -150 3, 4, 6, 7 3 1, 3 1, 3 1, 3 1, 3 350 1.1 2:1 51 -15 -65 -65 -95 -120 -135 0.5 -50 VCC ICC TC 50 3.135 3.300 -40°C RFM OP4018B YYWW 3.465 70 +85°C CAUTION: Electrostatic Sensitive Device. Observe precautions for handling. COCOM CAUTION: Approval by the U.S. Department of Commerce is required prior to export of this device. Notes: 1. 2. 3. 4. 5. 6. Unless otherwise noted, all specifications include any combination of load VSWR, VCC, and TC. In addition, Q and Q are terminated into 50 Ω loads to ground. (See: Typical Test Circuit.) Customer useful tune range in excess of what part requires over temp, aging, pushing, pulling & accuracy. The design, manufacturing process, and specifications of this device are subject to change without notice. Only under the nominal conditions of 50 Ω load impedance with VSWR ≤ 1.2 and nominal power supply voltage. Symmetry is defined as the pulse width (in percent of total period) measured at the 50% points of Q or Q. (See: Timing Definitions.) Jitter and other spurious outputs induced by externally generated electrical noise on VCC or mechanical vibration are not included in this specification, except where noted. External voltage regulation and careful PCB layout are recommended for optimum performance. Applies to period jitter of Q and Q. Measurements are made with the Tektronix CSA803 signal analyzer with at least 1000 samples. Linearity is a function of the percentage variation from a permitted linear deviation versus the amount of frequency tune range. See Linearity Definition. One or more of the following United States patents apply: 4,616,197; 4,670,681; 4,760,352. BLOCK DIAGRAM V CC V tune SAW Oscillator Buffer Amplifier Q _ Q 7. 8. 9. RF Monolithics, Inc. Phone: (972) 233-2903 Fax: (972) 387-8148 RFM Europe Phone: 44 1963 251383 Fax: 44 1963 251510 ©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc. E-mail: [email protected] http://www.rfm.com OP4018B-120806 Page 1 of 2 718.864 MHz SMC-8 Optical Timing Clock 8-Terminal Surface Mount Case Dimension A B C D mm MIN 13.46 9.14 MAX 13.97 9.66 MIN 0.530 0.360 Inches MAX 0.550 0.380 1.93 Nominal 3.56 Nominal 2.24 Nominal 1.27 Nominal 2.54 Nominal 3.05 Nominal 1.93 Nominal 5.54 Nominal 4.32 Nominal 4.83 Nominal 0.50 Nominal 0.076 Nominal 0.141 Nominal 0.088 Nominal 0.050 Nominal 0.100 Nominal 0.120 Nominal 0.076 Nominal 0.218 Nominal 0.170 Nominal 0.190 Nominal 0.020 Nominal ELECTRICAL CONNECTIONS Terminal Number 1 2 3 4 5 6 7 8 LID Connection E F G VCC Ground Enable/Disable Q Output Q Output Ground TUNE Input Ground 1 2 3 4 8 H 7 J 6 K 5 L M TOP VIEW N B C D E N (X8) A F (X8) M G L (X3) H (X2) K J RF Monolithics, Inc. Phone: (972) 233-2903 Fax: (972) 387-8148 RFM Europe Phone: 44 1963 251383 Fax: 44 1963 251510 ©1999 by RF Monolithics, Inc. The stylized RFM logo are registered trademarks of RF Monolithics, Inc. E-mail: [email protected] http://www.rfm.com OP4018B-120806 Page 2 of 2 .


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