Document
Freescale Semiconductor Advance Information
Document Number: MPC18730 Rev. 4.0, 8/2006
Power Management IC with Five Regulated Outputs Programmed Through 3-Wire Serial Interface
The MPC18730 Power Management IC (PMIC) regulates five independent output voltages from either a single cell Li-Ion (2.7 V to 4.2 V input range) or from a single cell Ni-MH or dry cell (0.9 V to 2.2 V input range). The PMIC includes 2 DC-DC converters and 3 low drop out (LDO) linear regulators. The output voltage for each of the 5 output voltages is set independently through a 3-wire serial interface. The serial interface also configures the PMIC's versatile start-up control system, which includes multiple wakeup, sleep, standby, and reset modes to minimize power consumption for portable equipment. In single cell Li-Ion applications two DC-DC converters are configured as buck (step-down) regulators. In single cell Ni-MH or dry cell applications, one DC-DC converter is configured as a boost (step-up) regulator, and the other as buck-boost regulator. The DCDC converters' output voltages have set ranges 1.613 V to 3.2 V at up to 120 mA, and 0.805 V to 1.5 V up to 100 mA. Features • • • • • • • Operates from single cell Li-Ion, Ni-MH, or Alkaline 2 DC-DC Converters 3 Low Drop Regulators Serial Interface Sets Output Voltages 4 Wake Inputs Low Current Standby Mode Pb-Free Packaging Designated by Suffix Code EP
VB VBATT VO VREF PGOOD1 VGATE_EXT VO
18730
POWER MANAGEMENT IC
EP SUFFIX (PB-FREE) 98ARL10571D 64-PIN QFN
ORDERING INFORMATION
Device MPC18730EP/R2 Temperature Range (TA) -10°C to 65°C Package 64 QFN
MPC18730
VOUT1 VO1_SENSE SW1 VOUT2 VO2_SENSE SW2 SREGI1 SREGO1 SREGI2 SREGO2 SREGI3 SREGO3 VGATE SWGATE VB
Programmable 1.613 V to 3.2 V
Programmable 0.805 V to 1.5 V
PGOOD2
MCU
{
Programmable 0.865 V to 2.8 V Programmable 0.011 V to 2.8 V Programmable 2.08 V to 2.8 V
CONTROL LOGIC INPUTS GND GNDGATE
Figure 1. MPC18730 Simplified Application Diagram
* This document contains certain information on a new product. Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
HVB LVB Driver
VMODE VMODE VO1_SENSE PGOOD1(Int) VO1_SENSE PGOOD1(Int) BANDGAP REFERENCE CLEAR VGATE PGOOD1(Int) POWER PGOOD1(Int) VO1_SENSE SWITCH1 REF1 VGATE Step-UpDown DC/DC Converter CH1
VBATT VBATT LVB V_STDBY VOUT1
VREF VREF LSWO
VO1_SENSE PGOOD1 RESET Block 1 PGOOD1_DELAY RESET1_TH EAIN1 EAOUT1
VO1_SENSE VIN1
SW1
PGND1 VGATE VOUT2 VO2_SENSE_IN VO2_SENSE HG REF2 Step-UpDown DC/DC Converter CH2 LG VIN2
DMAX1 VO1_SENSE PGOOD2 RESET Block 2 PGOOD2_DELAY EAOUT2 EAIN2
PGOOD2(Int) VGATE PGOOD2(Int)
POWER SWITCH2
SW2
DMAX2 VGATE REF3 SREGC1 Series Pass Regulator1 VGATE SREGC2 REF4 V_STDBY SREGC3 VO1_SENSE VBATT WAKE1B WAKE2B WAKE3B WAKE4B SEQ_SELECT DATA STRB SCKIN CLEAR SLEEP EXT_CLOCK GND VGATESEL1 VGATESEL2 WATCHDOG REF DAC REF5 VGATE Series Pass Regulator3 .