Document
74AHC1G14-Q100; 74AHCT1G14-Q100
Inverting Schmitt trigger
Rev. 1 — 13 July 2012 Product data sheet
1. General description
74AHC1G14-Q100 and 74AHCT1G14-Q100 are high-speed Si-gate CMOS devices. They provide an inverting buffer function with Schmitt-trigger action. These devices can transform slowly changing input signals into sharply defined, jitter-free output signals. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) SOT353-1 and SOT753 package options
3. Applications
Wave and pulse shapers Astable multivibrators Monostable multivibrators
NXP Semiconductors
74AHC1G14-Q100; 74AHCT1G14-Q100
Inverting Schmitt trigger
4. Ordering information
Table 1. Ordering information Package Temperature range Name 74AHC1G14GW-Q100 74AHCT1G14GW-Q100 74AHC1G14GV-Q100 74AHCT1G14GV-Q100 40 C to +125 C SC-74A 40 C to +125 C TSSOP5 Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm plastic surface-mounted package; 5 leads Version SOT353-1 SOT753 Type number
5. Marking
Table 2. Marking codes Marking code[1] AF CF A14 C14 Type number 74AHC1G14GW-Q100 74AHCT1G14GW-Q100 74AHC1G14GV-Q100 74AHCT1G14GV-Q100
[1]
The pin 1 indicator is on the lower left corner of the device, below the marking code.
6. Functional diagram
2
A
Y
4
2
mna024
4
A
Y
mna025
mna023
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
7. Pinning information
7.1 Pinning
$+&*4 $+&7*4
QF $ *1'
DDD
9&&
<
Fig 4.
Pin configuration
74AHC_AHCT1G14_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 13 July 2012
2 of 16
NXP Semiconductors
74AHC1G14-Q100; 74AHCT1G14-Q100
Inverting Schmitt trigger
7.2 Pin description
Table 3. Symbol n.c. A GND Y VCC Pin description Pin 1 2 3 4 5 Description not connected data input ground (0 V) data output supply voltage
8. Functional description
Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input A L H Output Y H L
9. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VI IIK IOK IO ICC IGND Tstg Ptot
[1] [2]
Parameter supply voltage input voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
Conditions
Min 0.5 0.5
Max +7.0 +7.0 20 25 75 +150 250
Unit V V mA mA mA mA mA C mW
VI < 0.5 V VO < 0.5 V or VO > VCC + 0.5 V 0.5 V < VO < VCC + 0.5 V
[1]
20 75 65
Tamb = 40 C to +125 C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
74AHC_AHCT1G14_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 13 July 2012
3 of 16
NXP Semiconductors
74AHC1G14-Q100; 74AHCT1G14-Q100
Inverting Schmitt trigger
10. Recommended operating conditions
Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC VI VO Tamb supply voltage input voltage output voltage ambient temperature Conditions 74AHC1G14-Q100 Min 2.0 0 0 40 Typ 5.0 +25 Max 5.5 5.5 VCC +125 74AHCT1G14-Q100 Min 4.5 0 0 40 Typ 5.0 +25 Max 5.5 5.5 VCC +125 V V V C Unit
11. Static characteristics
Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min For type 74AHC1G14-Q100 VOH HIGH-level VI = VT+ or VT output voltage IO = 50 A; VCC = 2.0 V IO = 50 A; VCC = 3.0 V IO = 50 A; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V VOL LOW-level VI = VT+ or VT output voltage IO = 50 A; VCC = 2.0 V IO = 50 A; VCC = 3.0 V IO = 50 A; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V II ICC CI input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V 1.9 2.9 4.4 2.58 3.94 2.0 3.0 4.5 0 0 0 1.5 0.1 0.1 0.1 0.36 0.36 0.1 1.0 10 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.44 0.44 1.0 10 10 1.9 2.9 4.4 2.40 3.70 0.1 0.1 0.1 0.55 0.55 2.0 40 10 V V V V V V V V V V A A pF 25 C Typ Max 40 C to +85 C 40 C to +125 .