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BUK9614-55A Dataheets PDF



Part Number BUK9614-55A
Manufacturers NXP Semiconductors
Logo NXP Semiconductors
Description N-Channel MOSFET
Datasheet BUK9614-55A DatasheetBUK9614-55A Datasheet (PDF)

D2 PA K BUK9614-55A N-channel TrenchMOS logic level FET Rev. 02 — 7 February 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits „ AEC Q101 compliant „ Low conduction losses due to low on-state resistance „ Suitable .

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D2 PA K BUK9614-55A N-channel TrenchMOS logic level FET Rev. 02 — 7 February 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits „ AEC Q101 compliant „ Low conduction losses due to low on-state resistance „ Suitable for logic level gate drive sources „ Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications „ 12 V and 24 V loads „ Automotive and general purpose power switching „ Motors, lamps and solenoids 1.4 Quick reference data Table 1. Symbol VDS ID Ptot Quick reference data Parameter drain-source voltage drain current total power dissipation Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 5 V; Tmb = 25 °C; see Figure 1; see Figure 3 Tmb = 25 °C; see Figure 2 Min Typ Max Unit 55 73 149 V A W Static characteristics RDSon drain-source on-state VGS = 5 V; ID = 25 A; Tj = 25 °C; resistance see Figure 12; see Figure 13 VGS = 4.5 V; ID = 25 A; Tj = 25 °C VGS = 10 V; ID = 25 A; Tj = 25 °C Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID = 73 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped 230 mJ 12 11 14 15 13 mΩ mΩ mΩ NXP Semiconductors BUK9614-55A N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pin 1 2 3 mb Pinning information Symbol Description G D S D gate drain source mounting base; connected to drain mbb076 Simplified outline mb Graphic symbol D G S 2 1 3 SOT404 (D2PAK) 3. Ordering information Table 3. Ordering information Package Name BUK9614-55A D2PAK Description Version plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404 (one lead cropped) Type number BUK9614-55A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 02 — 7 February 2011 2 of 14 NXP Semiconductors BUK9614-55A N-channel TrenchMOS logic level FET 4. Limiting values Table 4. Symbol VDS VDGR VGS ID Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current Tmb = 25 °C; VGS = 5 V; see Figure 1; see Figure 3 Tmb = 100 °C; VGS = 5 V; see Figure 1 IDM Ptot Tstg Tj VGSM IS ISM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature peak gate-source voltage source current peak source current non-repetitive drain-source avalanche energy pulsed; tp ≤ 50 µs Tmb = 25 °C pulsed; tp ≤ 10 µs; Tmb = 25 °C ID = 73 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 Tmb = 25 °C; see Figure 2 Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ Min -10 -55 -55 -15 Max 55 55 10 73 52 266 149 175 175 15 73 266 230 Unit V V V A A A W °C °C V A A mJ In accordance with the Absolute Ma.


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