PSMN3R0-30YL

LF PA K PSMN3R0-30YL N-channel 30 V 3 mΩ logic level MOSFET in LFPAK Rev. 04 — 10 March 2011 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in industrial and communications applications. 1.2 Features and benefits „ High efficiency due to low switching and conduction losses „ Suitable for logic level gate drive sources 1.3 Applications „ Class-D amplifiers „ DC-to-DC converters „ Motor control „ Server power supplies 1.4 Quick reference data Table 1. Symbol VDS ID Ptot Tj RDSon Quick reference data Parameter drain-source voltage drain current total power dissipation junction temperature drain-source on-state resistance gate-drain charge VGS = 10 V; ID = 15 A; Tj = 25 °C VGS = 4.5 V; ID = 10 A; VDS = 12 V; see Figure 14; see Figure 15 VGS = 4.5 V; ID = 10 A; VDS = 12 V; see Figure 14 VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; Vsup ≤ 30 V; RGS = 50 Ω; unclamped Conditions Tj ≥ 25 °C; Tj ≤ 175 °C Tmb = 25 °C; VGS = 10 V; see Figure 1 Tmb = 25 °C; see Figure 2 [1] Min -55 - Typ - Max Unit 30 100 81 175 V A W °C mΩ Static characteristics 2.19 3 Dynamic characteristics QGD 5.1 nC QG(tot) total gate charge - 21 - nC Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy 75 mJ [1] Continuous current is limited by package. NXP Semiconductors PSMN3R0-30YL N-channel 30 V ...