HD74LVC373A

HD74LVC373A Octal D-type Transparent Latches with 3-state Outputs ADE-205-112B(Z) 3rd Edition December 1996 Description The HD74LVC373A has eight D type latches with three state outputs in a 20 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and high speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@V CC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±24 mA (@VCC = 3.0 V to 5.5 V) Function Table Inputs G H L L L H: L: X: Z: Q0 : LE X H H L D X L H X Output Q Z L H Q0 High level Low level Immaterial High impedance Level of Q before the indicated steady input conditions were established. HD74LVC373A Pin Arrangement G 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 G Q D G Q D 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 LE D ...