HD74LV126A

HD74LV126A Quad. Bus Buffer Gates with 3-state Outputs ADE-205-259 (Z) 1st Edition March 1999 Description The HD74LV126A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE should be connected to GND through a pull-down resistor; the minimum value of the resistor is determined by the current souring capability of the driver. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V) Function Table Inputs OE H H L Note: H: L: X: Z: High level Low level Immaterial High impedance A H L X Output Y H L Z HD74LV126A Pin Arrangement 1OE 1 1A 2 1Y 3 2OE 4 2A 5 2Y 6 GND 7 14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y (Top view) 2 HD74LV126A Absolute Maximum Ratings Item Supply voltage range Input voltage range* 1 1, 2 Symbol VCC VI VO Ratings –0.5 to 7.0 –0.5 to 7.0 –0.5 to VCC + 0.5 –0.5 to 7.0 Unit V V V Conditions Output voltage range* Output: H or L VCC: OFF or Output: Z Input ...