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HD74HCT563 Dataheets PDF



Part Number HD74HCT563
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description Octal Transparent Latches (with 3-state outputs)
Datasheet HD74HCT563 DatasheetHD74HCT563 Datasheet (PDF)

HD74HCT563/HD74HCT573 Octal Transparent Latches (with 3-state outputs) Description When the latch enable (LE) input is high, the Q outputs of HD74HCT563 will follow the inversion of the D inputs and the Q outputs of HD74HCT573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enabled returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of w.

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HD74HCT563/HD74HCT573 Octal Transparent Latches (with 3-state outputs) Description When the latch enable (LE) input is high, the Q outputs of HD74HCT563 will follow the inversion of the D inputs and the Q outputs of HD74HCT573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enabled returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (D to Q, Q) = 13 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Outputs Output Control L L L H Latch Enable H H L X Data H L X X HD74HCT563 L H Q0 Z HD74HCT573 H L Q0 Z HD74HCT563/HD74HCT573 Pin Arrangement HD74HCT563 Output Control 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 OE D Q OE D Q OE D Q OE D Q OE D Q OE D Q OE D Q OE D Q 20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q Latch 11 Enable (Top view) 2 HD74HCT563/HD74HCT573 HD74HCT573 Output Control 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 GND 10 OE D Q OE D Q OE D Q OE D Q OE D Q OE D Q OE D Q OE D Q 20 VCC 19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q Latch 11 Enable (Top view) 3 HD74HCT563/HD74HCT573 Block Diagram HD74HCT563 1D 2D 3D D C Q C D C Q C D C Q C D C Q C D C Q C D C Q C D C Q C D C Q C 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 4D 5D 6D 7D 8D Enable C OC 4 HD74HCT563/HD74HCT573 HD74HCT573 1D 2D 3D D C Q C D C Q C D C Q C D C Q C D C Q C D C Q C D C Q C D C Q C 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 4D 5D 6D 7D 8D Enable C OC Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage DC current drain per pin DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage temperature Symbol VCC VIN VOUT I OUT I CC, I GND I IK I OK PT Tstg Rating –0.5 to +7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 –65 to +150 Unit V V V mA mA mA mA mW °C 5 HD74HCT563/HD74HCT573 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH VIL Output voltage VOH Ta = –40 to +85°C Max — 0.8 — — 0.1 0.33 ±5.0 ±1.0 40 µA µA µA V Unit V V V Test Conditions VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 5.5 5.5 Vin = VIH or VIL I OH = –20 µA I OH = –6 mA Vin = VIH or VIL I OL = 20 µA I OL = 6 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA Min Typ Max Min 2.0 — 4.4 — — — — 2.0 0.8 — — — 4.4 4.13 4.18 — VOL — — Off-state output current Input current I OZ Iin — — — — — — — — 0.1 — 0.26 — ±0.5 — ±0.1 — 4.0 — Quiescent current I CC AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol Ta = –40 to +85°C Max 28 28 29 29 38 38 38 38 — — — 15 15 10 pF ns ns ns ns ns ns ns Unit ns Test Conditions VCC (V) 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 — Enable G to Q, Q Data to Q, Q Min Typ Max Min — — — — — — — — 12 5 16 — — — 13 13 14 14 14 15 16 17 3 –1 4 4 4 5 22 22 23 23 30 30 30 30 — — — 12 12 10 — — — — — — — — 15 5 20 — — — Propagation delay t PLH time t PHL t PLH t PHL Output enable time Output disable time Setup time Hold time Pulse width Output rise/fall time Input capacitance t ZL t ZH t LZ t HZ t su th tw t TLH t THL Cin 6 Unit: mm 24.50 25.40 Max 20 11 7.00 Max 6.30 1 0.89 1.27 Max 10 1.30 2.54 Min 5.08 Max 7.62 0.51 Min 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.11 Hitachi Code JEDEC EIAJ Weight (reference value) DP-20N — Conforms 1.26 g Unit: mm 12.6 13 Max 20 11 1 10 5.5 0.80 Max 2.20 Max *0.22 ± 0.05 0.20 ± 0.04 0.20 7.80 + – 0.30 1.15 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DA — Conforms 0.31 g Unit: mm 12.8 13.2 Max 20 11 7.50 1 0.935 Max 10 2.65 Max *0.27 ± 0.05 0.25 ± 0.04 0.25 10.40 + – 0.40 1.45 0° – 8° 0.57 0.70 + – 0.30 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.12 M *Dimension including the plating thickness Base material dimension 0.20 ± 0.10 0.15 Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DB Conforms — 0.52 g Unit: mm 6.50 6.80 Max 20 11 4.40 1 10 0.65 0.20 ± 0.06 *0.22+0.08 –0.07 0.13 M 0.65 Max *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.07 +0.03 –0.04 0° – 8° 0.50 ± 0.10 1.0 6.40 ± 0.20 0.10 *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) TTP-20DA — — 0.07 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this .


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