HD74HC373

HD74HC373, HD74HC533 Octal D-type Transparent Latches (with 3-state outputs) Octal D-type Transparent Latches (with inverted 3-state outputs) REJ03D0619-0200 (Previous ADE-205-498) Rev.2.00 Mar 30, 2006 Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Features High Speed Operation: tpd (D to Q) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC373P HD74HC533P DILP-20 pin PRDP0020AC-B (DP-20NEV) P HD74HC373FPEL HD74HC533FPEL SOP-20 pin (JEITA) PRSP0020DD-B (FP-20DAV) FP HD74HC533RPEL SOP-20 pin (JEDEC) PRSP0020DC-A (FP-20DBV) RP HD74HC373TELL TSSOP-20 pin PTSP0020JB-A (TTP-20DAV) T Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) EL (1,000 pcs/reel) ELL (2,000 pcs/reel)...