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HD74ALVCH16500

Hitachi Semiconductor
Part Number HD74ALVCH16500
Manufacturer Hitachi Semiconductor
Description 18-bit Universal Bus Transceivers with 3-state Outputs
Published Mar 23, 2005
Detailed Description HD74ALVCH16500 18-bit Universal Bus Transceivers with 3-state Outputs ADE-205-167A (Z) 2nd. Edition December 1999 Descr...
Datasheet PDF File HD74ALVCH16500 PDF File

HD74ALVCH16500
HD74ALVCH16500

Overview
HD74ALVCH16500 18-bit Universal Bus Transceivers with 3-state Outputs ADE-205-167A (Z) 2nd.
Edition December 1999 Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock ( CLKAB and CLKBA) inputs.
For A to B data flow, the device operates in the transparent mode when LEAB is high.
When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level.
If LEAB is low, the A bus data is stored in the latch flip flop on the high to low transition of CLKAB.
Output enable OEAB is active high.
When OEAB is high, the B port outputs are active.
When OEAB is low, the B port outputs are in the high impedance state.
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