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MB90F343A Dataheets PDF



Part Number MB90F343A
Manufacturers Fujitsu Media Devices
Logo Fujitsu Media Devices
Description 16-bit Proprietary Microcontroller CMOS
Datasheet MB90F343A DatasheetMB90F343A Datasheet (PDF)

www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-13730-3E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90340 Series MB90F342A(S), MB90F342CA(S), MB90F343A(S), MB90F343CA(S), MB90F345A(S), MB90F345CA(S), MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S), MB90341CA(S), MB90342A(S), MB90342CA(S), MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S), MB90348CA(S), MB90349A(S), MB90349CA(S), MB90V340A-101/102 s DESCRIP.

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www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-13730-3E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90340 Series MB90F342A(S), MB90F342CA(S), MB90F343A(S), MB90F343CA(S), MB90F345A(S), MB90F345CA(S), MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S), MB90341CA(S), MB90342A(S), MB90342CA(S), MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S), MB90348CA(S), MB90349A(S), MB90349CA(S), MB90V340A-101/102 s DESCRIPTION The MB90340-series with up to 2 FULL-CAN* interfaces and FLASH ROM is especially designed for automotive and other industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip FLASH-ROM program memory up to 512 Kbytes. The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a major advantage in terms of EMI and power consumption. The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external 4 MHz clock. The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit free running timers. 4 UARTs constitute additional functionality for communication purposes. * : Controller Area Network (CAN) - License of Robert Bosch GmbH Note : F2MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED. s PACKAGES 100-pin Plastic QFP 100-pin Plastic LQFP (FPT-100P-M06) (FPT-100P-M05) MB90340 Series s FEATURES • Clock • Built-in PLL clock frequency multiplication circuit • Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz). • Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed. (devices without Ssuffix only) • Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multiplied PLL clock). • Built-in Clock Modulation circuit • 16 Mbyte CPU memory space • 24-bit internal addressing • Instruction system best suited to controller • Wide choice of data types (bit, byte, word, and long word) • Wide choice of addressing modes(23 types) • Enhanced multiply-divide instructions and RETI instructions • Enhanced high-precision computing with 32-bit accumulator • Instruction system compatible with high-level language (C language) and multitask • Employing system stack pointer • Enhanced various pointer indirect instructions • Barrel shift instructions • Increased processing speed • 4-byte instruction queue • Powerful interrupt function • Powerful 8-level, 34-condition interrupt feature • Up to 16 external interrupts are supported • Automatic data transfer function independent of CPU • Expanded intelligent I/O service function (EI2OS) : up to 16 channels • DMA : up to 16 channels • Low power consumption (standby) mode • Sleep mode (a mode that halts CPU operating clock) • Main timer mode (time-base timer mode that is transfered from main clock mode) • PLL timer mode (time-base timer mode that is transfered from PLL clock mode) • Watch mode (a mode that operates sub clock and clock timer only) • Stop mode (a mode that stops oscillation clock and sub clock) • CPU blocking operation mode • Process • CMOS technology • I/O port • General-purpose input/output port (CMOS output) - 80 ports (devices without S-suffix) - 82 ports (devices with S-suffix) (Continued) 2 MB90340 Series (Continued) • Timer • Time-base timer, clock timer, watchdog timer : 1 channel • 8/16-bit PPG timer : 8-bit X 16 channels, or 16-bit X 8 channels • 16-bit reload timer : 4 channels • 16- bit input/output timer - 16-bit free run timer : 2 channel (FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7) - 16- bit input capture: (ICU) : 8 channels - 16-bit output compare : (OCU) : 8 channels • Full-CAN interface : up to 2 channels • Compliant with Ver2.0A and Ver2.0B CAN specifications • Flexible message buffering (mailbox and FIFO buffering can be mixed) • CAN wake-up function • UART (LIN/SCI) : up to 4 channels • Equipped with full-duplex double buffer • Clock-asynchronous or clock-synchronous serial transmission is available • I2C interface* : up to 2 channels (devices with C-suffix only) • Up to 400 Kbits/s transfer rate • DTP/External interrupt : up to 16 channels, CAN wakeup : up to 2 channels • Module for activation of expanded intelligent I/O service (EI2OS), DMA, and generation of external interrupt. • Delay interrupt generator module • Generates interrupt request for task switching. • 8/10-bit A/D converter : 16/24 channels • Resolution is selectable between 8-bit and 10-bit. • Activation by external trigge.


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