AGLN250

IGLOO nano Low Power Flash FPGAs with Flash*Freeze Technology Revision 19 DS0110 Features and Benefits Low Power nanoPower Consumption—Industry’s Lowest Power 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power Consumption while Maintaining FPGA Content Easy Entry to / Exit from Ultra-Low Power Flash*Freeze Mode Small Footprint Packages As Small as 3x3 mm in Size Wide Range of Features 10,000 to 250,000 System Gates Up to 36 kbits of True Dual-Port SRAM Up to 71 User I/Os Reprogrammable Flash Technology 130-nm, 7-Layer Metal, Flash-Based CMOS Process Instant On Level 0 Support Single-Chip Solution Retains Programmed Design When Powered Off 250 MHz (1.5 V systems) and 160 MHz (1.2 V systems) System Performance In-System Programming (ISP) and Security ISP Using On-Chip 128-Bit Advanced Encryption Standard F(AlaEsSh)LDocekc®ryDpteiosnignvieadJtToASGec(IuErEeEFP15G3A2–Ccoonmtepnlitasnt) 1.2 V Programming High-Performance Routing Hierarchy Segmented, Hierarchical Routing and Clock Structure Advanced I/Os 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation Bank-Selectable I/O Voltages—up to 4 Banks per Chip Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7 V to 3.6 V Wide Range Pow...