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MX29F800CT Dataheets PDF



Part Number MX29F800CT
Manufacturers MACRONIX
Logo MACRONIX
Description 8M-BIT [1024K x 8 / 512K x 16] SINGLE VOLTAGE 5V ONLY FLASH MEMORY
Datasheet MX29F800CT DatasheetMX29F800CT Datasheet (PDF)

MX29F800C T/B 8M-BIT [1024K x 8 / 512K x 16] SINGLE VOLTAGE 5V ONLY FLASH MEMORY FEATURES GENERAL FEATURES • Single Power Supply Operation - 4.5 to 5.5 volt for read, erase, and program operations • 1,048,576 x 8 / 524,288 x 16 switchable • Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector • Sector Structure - 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 15 • Sector protection - Hardware method to disable any combination of sectors from program or .

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MX29F800C T/B 8M-BIT [1024K x 8 / 512K x 16] SINGLE VOLTAGE 5V ONLY FLASH MEMORY FEATURES GENERAL FEATURES • Single Power Supply Operation - 4.5 to 5.5 volt for read, erase, and program operations • 1,048,576 x 8 / 524,288 x 16 switchable • Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector • Sector Structure - 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 15 • Sector protection - Hardware method to disable any combination of sectors from program or erase operations - Temporary sector unprotected allows code changes in previously locked sectors • Latch-up protected to 100mA from -1V to Vcc + 1V • Compatible with JEDEC standard - Pinout and software compatible to single power supply Flash PERFORMANCE • High Performance - Access time: 70ns - Byte/Word program time: 9us/11us (typical) - Erase time: 0.7s/sector, 8s/chip (typical) • Low Power Consumption - Low active read current: 40mA (maximum) at 5MHz - Low standby current: 1uA (typical) • Minimum 100,000 erase/program cycle • 20 years data retention SOFTWARE FEATURES • Erase Suspend/ Erase Resume - Suspends sector erase operation to read data from or program data to another sector which is not being erased • Status Reply - Data# Polling & Toggle bits provide detection of program and erase operation completion HARDWARE FEATURES • Ready/Busy# (RY/BY#) Output - Provides a hardware method of detecting program and erase operation completion • Hardware Reset (RESET#) Input - Provides a hardware method to reset the internal state machine to read mode PACKAGE • 44-Pin SOP • 48-Pin TSOP • 48-Ball LFBGA (6x8mm) • All devices are RoHS Compliant • All non RoHS Compliant devices are not recommeded for new design in P/N:PM1493 REV. 1.2, JUL. 05, 2012 1 http://www.Datasheet4U.com MX29F800C T/B PIN CONFIGURATIONS 44 SOP(500mil) RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# GND OE# Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 RESET# WE# A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE# GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC 48 TSOP(TYPE I) (12mm x 20mm) MX29F800CT/CB A15 A14 A13 A12 A11 A10 A9 A8 NC NC WE# RESET# NC NC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 MX29F800C T/B 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE# GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC Q11 Q3 Q10 Q2 Q9 Q1 Q8 Q0 OE# GND CE# A0 P/N:PM1493 REV. 1.2, JUL. 05, 2012 2 http://www.Datasheet4U.com MX29F800C T/B 48-Ball LFBGA (6x8mm) 6 5 4 3 2 1 A13 A12 A14 A15 A16 BYTE# Q15/ A-1 Q13 GND A9 A8 RESET# A10 A11 Q7 Q14 Q6 WE# NC NC Q5 Q12 VCC Q4 RY/ BY# A7 NC A18 NC Q2 Q10 Q11 Q3 A17 A6 A5 Q0 Q8 Q9 Q1 A3 A4 A2 A1 A0 CE# OE# GND A B C D E F G H PIN DESCRIPTION SYMBOL A0~A18 Q0~Q14 Q15/A-1 CE# WE# BYTE# RESET# OE# RY/BY# VCC GND Address Input Data Input/Output Q15(Word mode)/LSB addr(Byte mode) Chip Enable Input Write Enable Input Word/Byte Selection input Hardware Reset Pin/Sector Protect Unlock Output Enable Input Ready/Busy Output Power Supply Pin (+5V) Ground Pin PIN NAME LOGIC SYMBOL 19 A0-A18 Q0-Q15 (A-1) 16 or 8 CE# OE# WE# RESET# BYTE# RY/BY# P/N:PM1493 REV. 1.2, JUL. 05, 2012 3 http://www.Datasheet4U.com MX29F800C T/B BLOCK DIAGRAM CE# OE# WE# RESET# BYTE# CONTROL INPUT LOGIC WRITE PROGRAM/ERASE HIGH VOLTAGE STATE MACHINE (WSM) STATE FLASH ARRAY ARRAY Y-PASS GATE SOURCE HV COMMAND DATA DECODER REGISTER X-DECODER ADDRESS LATCH A0-AM AND BUFFER SENSE AMPLIFIER Y-DECODER PGM DATA HV COMMAND DATA LATCH PROGRAM DATA LATCH Q0-Q15/A-1 I/O BUFFER AM: MSB address P/N:PM1493 REV. 1.2, JUL. 05, 2012 4 http://www.Datasheet4U.com MX29F800C T/B Table 1. SECTOR STRUCTURE MX29F800CT TOP BOOT SECTOR ADDRESS TABLE Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 Sector Size Byte Mode 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 32Kbytes 8Kbytes 8Kbytes 16Kbytes Word Mode 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 32Kwords 16Kwords 4Kwords 4Kwords 8Kwords Address range Byte Mode (x8) 00000h-0FFFFh 10000h-1FFFFh 20000h-2FFFFh 30000h-3FFFFh 40000h-4FFFFh 50000h-5FFFFh 60000h-6FFFFh 70000h-7FFFFh 80000h-8FFFFh 90000h-9FFFFh A0000h-AFFFFh B0000h-BFFFFh C0000h-CFFFFh D0000h-DFFFFh E0000h-EFFFFh F0000h-F7FFFh F8000h-F9FFFh FA000h-FBFFFh FC000h-FFFFFh Word Mode(x16) 00000h-07FFFh 08000h-0FFFFh 10000h-17FFFh 18000h-1FFFFh 20000h-27FFFh 28000h-2FFFFh 30000h-37FFFh 38000h-3FFFFh 40000h-47FFFh 48000h-4FFFFh 50000h-57FFFh 58000h-5FFFFh 60000h-67FFFh 68000h-6FFFFh 70000h-77FFFh 78000h-7BFFFh 7C000h-7CFFFh 7D000h-7DFFFh 7E000h-7FFFFh A18 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 .


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