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AD9656 Dataheets PDF



Part Number AD9656
Manufacturers Analog Devices
Logo Analog Devices
Description 1.8 V Analog-to-Digital Converter
Datasheet AD9656 DatasheetAD9656 Datasheet (PDF)

Data Sheet FEATURES SNR = 79.9 dBFS at 16 MHz (VREF = 1.4 V) SNR = 78.1 dBFS at 64 MHz (VREF = 1.4 V) SFDR = 86 dBc to Nyquist (VREF = 1.4 V) JESD204B Subclass 1 coded serial digital outputs Flexible analog input range: 2.0 V p-p to 2.8 V p-p 1.8 V supply operation Low power: 197 mW per channel at 125 MSPS (two lanes) DNL = ±0.6 LSB (VREF = 1.4 V) INL = ±4.5 LSB (VREF = 1.4 V) 650 MHz analog input bandwidth, full power Serial port control Full chip and individual channel power-down modes Built-i.

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Data Sheet FEATURES SNR = 79.9 dBFS at 16 MHz (VREF = 1.4 V) SNR = 78.1 dBFS at 64 MHz (VREF = 1.4 V) SFDR = 86 dBc to Nyquist (VREF = 1.4 V) JESD204B Subclass 1 coded serial digital outputs Flexible analog input range: 2.0 V p-p to 2.8 V p-p 1.8 V supply operation Low power: 197 mW per channel at 125 MSPS (two lanes) DNL = ±0.6 LSB (VREF = 1.4 V) INL = ±4.5 LSB (VREF = 1.4 V) 650 MHz analog input bandwidth, full power Serial port control Full chip and individual channel power-down modes Built-in and custom digital test pattern generation Multichip sync and clock divider Standby mode Quad, 16-Bit, 125 MSPS, JESD204B 1.8 V Analog-to-Digital Converter AD9656 FUNCTIONAL BLOCK DIAGRAM AVDD PDWN 16 DVDD DRVDD VINA+ VINA– VINB+ VINB– RBIAS VREF SENSE REF SELECT AGND VINC+ VINC– VIND+ VIND– PIPELINE ADC 16 PIPELINE ADC PIPELINE ADC JESD204B INTERFACE CML TX OUTPUTS SERDOUT0+ SERDOUT0– SERDOUT1+ SERDOUT1– SERDOUT2+ SERDOUT2– SERDOUT3+ SERDOUT3– DSYNC+ DSYNC– 16 1V TO 1.4V HIGH SPEED SERIALIZERS PIPELINE ADC SERIAL PORT INTERFACE 16 CONTROL REGISTERS VCM CLOCK MANAGEMENT DSYSREF+/ DSYSREF– SYNC CLK+/ CLK– AD9656 DVSS Medical imaging High speed imaging Quadrature radio receivers Diversity radio receivers Portable test equipment CSB SDIO SCLK SVDD APPLICATIONS Figure 1. GENERAL DESCRIPTION The AD9656 is a quad, 16-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The device operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. Individual channel power-down is supported and typically consumes less than 14 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as a programmable output clock, data alignment, and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). The AD9656 is available in an RoHS-compliant, nonmagnetic, 56-lead LFCSP. It is specified over the −40°C to +85°C industrial temperature range. This product is protected by a U.S. patent. PRODUCT HIGHLIGHTS 1. It has a small footprint. Four ADCs are contained in a small, 8 mm × 8 mm package. 2. An on-chip phase-locked loop (PLL) allows users to provide a single ADC sampling clock; the PLL multiplies the ADC sampling clock to produce the corresponding JESD204B data rate clock. 3. The configurable JESD204B output block supports up to 6.4 Gbps per lane. 4. JESD204B output block supports one, two, and four lane configurations. 5. Low power of 198 mW per channel at 125 MSPS, two lanes. 6. The SPI control offers a wide range of flexible features to meet specific system requirements. Rev. 0 Document Feedback One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Free Datasheet http://www.Datasheet4U.com 11868-001 AD9656 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 DC Specifications, VREF = 1.4 V .................................................. 3 DC Specifications, VREF = 1.0 V .................................................. 4 AC Specifications, VREF = 1.4 V .................................................. 5 AC Specifications, VREF = 1.0 V .................................................. 6 Digital Specifications ...................................


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