TC4027BF

TC4027BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4027BP, TC4027BF TC4027B Dual J-K Master-Slave Flip Flop TC4027B is J-K master-slave flip-flop having RESET and SET functions. In the case of J-K made, when the clock input is given with both RESET and SET at “L”, the output changes at rising edge of the clock according to the states of J and K. When SET input is placed at “H”, and RESET input is placed at “L”, outputs become Q = “H”, and Q = “L”. When RESET input is placed at “H”, and SET input is placed at “L”, outputs become Q = “L”, and Q = “H”. When both of RESET input and SET input are at “H”, outputs become Q = “H” and Q = “H”. Pin Assignment TC4027BP TC4027BF Block Diagram Weight DIP16-P-300-2.54A SOP16-P-300-1.27A : 1.00 g (typ.) : 0.18 g (typ.) Start of commercial production 1985-02 1 2014-03-01 Truth Table Inputs RESET SET J K L H * * H L * * H H * * L L L L L L L H L L H L L L H H L L * * *: Don’t care Δ: Level change *: No change **: Change Logic Diagram 1/2 TC4027B CLOCKΔ * * * Outputs Qn + 1 H Qn + 1 L L H H H Qn* Qn* L H H L Qn ** Qn* Qn** Qn * TC4027BP/BF Absolute Maximum Ratings (Note) Characteristics DC supply voltage Input voltage Output voltage DC input current Power dissipation Operating temperature range Storage temperature range Symbol Rating Unit VDD VIN VOUT IIN PD Topr Tstg VSS − 0.5 to VSS + 20 V VSS − 0.5 to VDD + 0.5 V VSS − 0.5 to VDD + 0.5 V ±10 m...